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Dive into the research topics where Kohsuke Harada is active.

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Featured researches published by Kohsuke Harada.


IEEE Communications Letters | 2017

Multi-Level Read/Write Signaling Using Pulse Width Modulation for High Density Perpendicular Magnetic Recording

Kohsuke Harada; Akihiro Yamazaki; Akihiko Takeo

In this letter, we propose a novel read/write (R/W) signal processing method by 3-ary amplitude shift keying for high density perpendicular magnetic recording. We also provide a 3B2T modulation to generate 3-ary signal, which will be converted to a pulse width modulation (PWM) signal, and then recorded on magnetic media. The PWM signal can be simply demodulated to derive the 3-ary signal through a low-pass filter at readback side. The demodulated signal in the presence of intersymbol interference is detected by the Viterbi algorithm as partial response signal. Nonbinary low-density parity-check codes over GF(8) are applied as error correcting codes in our evaluation. Our simulation result shows the proposed R/W method has +4% more user bit density gain than conventional binary recording.


international symposium on information theory and its applications | 2008

A reliable soft-output of autoregressive ML detector for perpendicular magnetic recording with intertrack interference

Kohsuke Harada; Hironori Uchikawa

In this paper, we consider a behavior of an autoregressive maximum-likelihood (ARML) detector and that of a conventional partial-response ML (PRML) detector against intertrack interference (ITI) of a perpendicular magnetic recording. Based on the consideration, we propose a calculation of a branch metric with the ITI estimation for the ARML detector, And also, we explain that the performance of the ARML detector is sensitive to the ITI. Finally, we show that our proposed ARML detector can derive a better performance against the ITI.


2008 5th International Symposium on Turbo Codes and Related Topics | 2008

Reduced-complexity serial min-sum decoding

Hironori Uchikawa; Kohsuke Harada; Yasuhiko Tanabe

We propose a complexity-reducing method for serial min-sum decoding that reduces the number of check nodes to process during an iteration. The check nodes to skip are chosen based on the reliability, a syndrome and a log-likelihood-ratio (LLR) value, of the incoming messages. The proposed method is evaluated by computer simulations and shown to reduce the decoding complexity up to 70% compared with conventional serial min-sum decoding with small fractional decibel degradation in error correction performance.


Archive | 2005

Mapping method for encoded bits using LDPC code, transmitting and receiving apparatuses employing this method, and program for executing this method

Kohsuke Harada


Archive | 2007

Readback apparatus and readback method

Kohsuke Harada


Archive | 2005

Decoding apparatus and decoding circuit

Kohsuke Harada


Archive | 2005

Decoding apparatus and method for decoding the data encoded with an LDPC code

Kohsuke Harada


Archive | 2006

Encoding method, decoding method, encoding system, recording method, reading method and recording system

Kohsuke Harada


Archive | 2009

Magnetic disk apparatus and information reproducing method

Yasushi Tomizawa; Kohsuke Harada; Hiroaki Nakamura; Yoshiyuki Ishihara; Shinji Takakura


Archive | 2007

Apparatus, method and program for decoding

Hironori Uchikawa; Kohsuke Harada

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