Kow-Ming Chang

Electrical characteristics of low temperature polysilicon TFT with a novel TEOS/oxynitride stack gate dielectric

This investigation is the first to demonstrate a novel tetraethylorthosilicate (TEOS)/oxynitride stack gate dielectric for low-temperature poly-Si (LTPS) thin film transistors (TFTs), composed of a plasma-enhanced chemical vapor deposition (PECVD) thick TEOS oxide/ultrathin oxynitride grown by PECVD N/sub 2/O-plasma. The stack oxide shows a very high electrical breakdown field of 8.4 MV/cm, which is approximately 3 MV/cm larger than traditional PECVD TEOS oxide. The field effective mobility of stack oxide LTPS TFTs is over 4 times than that of traditional TEOS oxide LTPS TFTs. These improvements are attributed to the high quality N/sub 2/O-plasma grown ultrathin oxynitride forming strong Si/spl equiv/N bonds, as well as to reduce the trap density in the oxynitride/poly-Si interface.

A novel pH-dependent drift improvement method for zirconium dioxide gated pH-ion sensitive field effect transistors.

A novel compensation method for Zirconium dioxide gated Ion Sensitive Field Effect Transistors (ISFETs) to improve pH-dependent drift was demonstrated. Through the sequential measurements for both the n-channel and p-channel ISFETs, 75–100% pH-dependent drift could be successfully suppressed for the first seven hours. As a result, a nearly constant drift rate versus pH value was obtained, which increases the accuracy of pH measurements. Meanwhile, the drawback of the hyperbolic-like change with time of the common drift behavior for ISFETs was improved. A state-of-the-art integrated scheme adopting this method was also illustrated.

The relaxation phenomena of positive charges in thin gate oxide during Fowler-Nordheim tunneling stress

In this study, new relaxation phenomena of positive charges in gate oxide with Fowler-Nordheim (FN) constant current injections have been investigated and characterized. It was found that the magnitudes of applied gate voltage shifts (/spl Delta/V/sub FN/) during FN injections, after positive charges relaxed or discharged, have a logarithmic dependence with the relaxation time for both injection polarities. The results can derive the relationship of transient discharging currents, that flow through the oxides after removal of the stress voltage, with the relaxation time. We have shown that the current has a 1/f dependence for both injection polarities which can be also derived from the tunneling front model. The effects of oxide fields (lower than the necessary voltage for FN tunneling) and wafer temperatures (373 and 423 K) for the relaxation of positive charges are also studied.

Interface characteristics of selective tungsten on silicon using a new pretreatment technology for ULSI application

The characteristics of selective tungsten film on silicon strongly depend on the surface properties of the underlying substrate. In this work, a new pretreatment process prior to selective tungsten film deposition has been developed. A CF/sub 4//O/sub 2/ mixed plasma modification procedure and a subsequent O/sub 2/ plasma ashing step combine to achieve efficient surface precleaning. The damage and contamination induced by reactive ion etching (RIE) are thus eliminated. Concurrently, a subsequent anhydrous HF cleaning was used to remove the native oxide on silicon as well as to obtain a fluorine-passivated silicon surface which can avoid reoxidation during the transport of wafers. This new pretreatment technology produces tungsten films that retain superior physical properties within the aspects of deposition rate, film morphology, and selectivity. Also, excellent interface characteristics with low silicon consumption, low contact resistance, low contact leakage current, and fewer impurities of fluorine, oxygen, and carbon within the interfacial region are obtained.

An Alternative Process for Silicon Nanowire Fabrication with SPL and Wet Etching System

Silicon nanowire fabrication of nanoscale dimensions on a single-crystal silicon surface by scanning probe lithography (SPL) and potassium hydroxide (KOH) aqueous wet etching system has proven to be adequate technological processes. Using SPL directly to define patterns on a single-crystal silicon surface showed that the linewidth of ∼50 nm can be further shrunk to -20 nm with KOH wet etching and orientation-dependent etching (ODE) processes on (110)-oriented silicon samples. In addition, this lithography technique also showed a great ability to define patterns on fluorocarbon mask layers. This method performed the fine linewidth of silicon nanowires around 20 nm by operating with lower applied voltages and higher scanning speeds (shorter exposure time) with SPL and ODE techniques and KOH wet etching on (100)-oriented silicon samples. These alternative processes provide the capability to fabricate nanoscale structures with high reliability and repeatablility for applications in the nanofields.

Performance and reliability of low-temperature polysilicon TFT with a novel stack gate dielectric and stack optimization using PECVD nitrous oxide plasma

This paper proposes a novel tetraethylorthosilicate (TEOS)/oxynitride stack gate dielectric for low-temperature poly-Si thin-film transistors, composed of a plasma-enhanced chemical vapor deposition (PECVD) thick TEOS oxide/ultrathin oxynitride grown by PECVD N/sub 2/O plasma. The novel stack gate dielectric exhibits a very high electrical breakdown field of 8.5 MV/cm, which is approximately 3 MV/cm higher than traditional PECVD TEOS oxide. The novel stack oxide also has better interface quality, lower bulk-trap density, and higher long-term reliability than PECVD TEOS dielectrics. These improvements are attributed to the formation of strong Si/spl equiv/N bonds of high quality ultra-thin oxynitride grown by PECVD N/sub 2/O plasma, and the reduction in the trap density at the oxynitride/poly-Si interface.

Low-temperature poly-si thin-film transistor with a N2O-Plasma ONO multilayer gate dielectric

High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with oxide/nitride/xynitride (ONO) multilayer gate dielectrics were fabricated. The low-temperature (≤300°C) ONO multilayer dielectric uses three stacked layers: the bottom layer is a very thin N 2 O-plasma oxynitride deposited by plasma-enhanced chemical vapor deposition (PECVD), the middle layer is PECVD Si 3 N 4 , and the top layer is tetraethoxysilane (TEOS) oxide. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time-dependent dielectric breakdown lifetime and a lower charge trapping rate than single-layer PECVD TEOS oxide or nitride. The fabricated poly-Si TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 213 cm 2 /V s, and an ON/OFF current ratio of over 10 8 .

Development of FET-Type Reference Electrodes for pH-ISFET Applications

A reference field effect transistor FET fabrication method by using a perfluorosulfonated proton exchange membrane associated with ion-insensitive polymers is proposed. The single-layer film of the perfluorosulfonated polymer/photoresist composite among the eight films tested demonstrated the best performance of 5.8 mV/pH and 11.27 mV/pNa sensitivities. Meanwhile, the drift performances were 3.5 mV/h and less than 1 mV/h for the first and second 4 h tests. A high sensitivity of 52.1 mV/pH and a low interference of 4.61 mV/pNa were obtained in the range of pH 1–13 through the differential arrangement with ZrO2 gate ion-sensitive field-effect transistors ISFETs . Meanwhile, the transconductance match of the proposed reference FET/ISFET pair would simplify the differential readout circuits.

The Changing Effect of N 2 / O 2 Gas Flow Rate Ratios on Ultrathin Nitrogen-Enriched Oxynitride Gate Dielectrics

We report the growth of an ultrathin 1.0 nm (equivalent oxide thickness = 0.86 nm) oxynitride gate dielectric by rapid thermal processing (RTP) in high-N 2 but low-O 2 gas flow ambient. The effect of the changing N 2 /O 2 gas flow ratio on the characteristics of oxynitride films was investigated. High-quality oxynitride film could be formed by RTP in an optimum N 2 /O 2 gas flow ratio of 5/1. Detailed characterization (transmission electron microscopy, J-E capacitance-voltage, stress-induced leakage current, charge-trapping properties) demonstrated the high quality of the oxynitride dielectric and showed that low leakage current density J g = 0.1 A/cm 2 at I V, was 1.85 orders of magnitude lower than that of SiO 2 . These improvements are attributed to the presence of nitrogen at the interface and in the hulk of the oxynitride.

High-performance RSD poly-Si TFTs with a new ONO gate dielectric

This paper developed a novel polycrystalline silicon (poly-Si) thin-film transistor (TFT) structure with the following special features: 1) a new oxide-nitride-oxynitride (ONO) multilayer gate dielectric to reduce leakage current, improved breakdown characteristics, and enhanced reliability; and 2) raised source/drain (RSD) structure to reduce series resistance. These features were used to fabricate high-performance RSD-TFTs with ONO gate dielectric. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time dependent dielectric breakdown, larger Q/sub BD/, and a lower charge-trapping rate than single-layer plasma-enhanced chemical vapor deposition tetraethooxysilane oxide or nitride. The fabricated RSD-TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 320 cm/sup 2//V/spl middot/s, and an on/off current ratio exceeding 10/sup 8/.