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Dive into the research topics where Kuan-Hsun Huang is active.

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Featured researches published by Kuan-Hsun Huang.


IEEE Sensors Journal | 2002

A CMOS focal-plane motion sensor with BJT-based retinal smoothing network and modified correlation-based algorithm

Chung-Yu Wu; Kuan-Hsun Huang

This work presents and implements a CMOS real-time focal-plane motion sensor intended to detect the global motion, using the bipolar junction transistor (BJT)-based retinal smoothing network and the modified correlation-based algorithm. In the proposed design, the BJT-based retinal photoreceptor and smoothing network are adopted to acquire images and enhance the contrast of an image while the modified correlation-based algorithm is used in signal processing to determine the velocity and direction of the incident image. The deviations of the calculated velocity and direction for different image patterns are greatly reduced by averaging the correlated output over 16 frame-sampling periods. The proposed motion sensor includes a 32/spl times/32 pixel array with a pixel size of 100/spl times/100 /spl mu/m/sup 2/. The fill factor is 11.6% and the total chip area is 4200/spl times/4000 /spl mu/m/sup 2/. The DC power consumption is 120 mW at 5 V in the dark. Experimental results have successfully confirmed that the proposed motion sensor can work with different incident images and detect a velocity between 1 pixel/s and 140,000 pixels/s via controlling the frame-sampling period. The minimum detectable displacement in a frame-sampling period is 5 /spl mu/m. Consequently, the proposed high-performance new motion sensor can be applied to many real-time motion detection systems.


international symposium on neural networks | 1992

A hybrid neural network for seismic pattern recognition

Kuan-Hsun Huang; H.Z. Yang

An artificial neural network designed to recognize seismic patterns is presented. It is a hybrid model because it consists of both unsupervised and supervised learning. The unsupervised layer plays the feature extracting role, and the supervised layer is responsible for class decision. When learning is completed, the user presents a seismic pattern to this model to obtain a decision on to which class the input pattern belongs. If the model fails to recognize a pattern, that means there are no nodes located in the output layer that produce a large enough response. Then, the model will automatically decrease its vigilance threshold to become more tolerant. This automatic-tolerance-adjusted mechanism is demonstrated on some examples, such as recognizing patterns in translation, scaling, noise, or deformation. The concepts are based on competitive learning from Kohonen, self-organization learning from Fukushima, and the delta rule.<<ETX>>


IEEE Sensors Journal | 2004

Analysis and design of a CMOS angular velocity- and direction-selective rotation sensor with a retinal Processing circuit

Kuan-Hsun Huang; Li-Ju Lin; Chung-Yu Wu

This paper implements and analyzes a CMOS angular velocity- and direction-selective rotation sensor with a retinal processing circuit. The proposed rotation sensor has a polar structure and is selective of the angular velocity and direction (clockwise and counterclockwise) of the rotation of images. The correlation-based algorithm is adopted and each pixel in the rotation sensor is correlated with the pixel that is 45/spl deg/ apart. The angular velocity selectivity is enhanced by placing more than one pixel between two correlated pixels. The angular velocity selectivity is related to both the number and the positions of the edges in an image. Detailed analysis characterizes angular velocity selectivity for different edges. An experimental chip consisting 104 pixels, which form five concentric circles, is fabricated. The single pixel has an area of 91/spl times/84/spl mu/m/sup 2/ and a fill factor of 20%, whereas the area of the chip is 1812/spl times/1825/spl mu/m/sup 2/. The experimental results concerning the fabricated chip successfully verified the analyzed characteristics of angular velocity and direction selectivity. They showed that the detectable angular velocity and range of illumination of this rotation sensor are from 2.5/spl times/10/sup -3/ /spl pi//s to 40 /spl pi//s and from 0.91 lux to 366 lux, respectively.


international conference on nanotechnology | 2001

The quantum-dot large-neighborhood cellular nonlinear network (QLN-CNN) in nanotechnology

Li-Ju Lin; Chiu-Hung Cheng; Kuan-Hsun Huang; Chung-Yu Wu

The quantum-dot large-neighborhood cellular neural (nonlinear) network (QLN-CNN) is proposed and analyzed. In the proposed QLN-CNN, the quantum dots are used to realized neuron cells whereas the strength of Coulombic forces among neurons are used as weights among neurons. The proposed QLN-CNN can perform the functions of image noise removal. It has small chip area and high cell density. Moreover, the power dissipation is very low. Thus large-size QLN-CNN could be realized for nanoelectronic systems.


IEEE Circuits & Devices | 2001

In the blink of a silicon eye

Chiu-Hung Cheng; Chung-Yu Wu; Bing J. Sheu; Li-Ju Lin; Kuan-Hsun Huang; Hsin-Chin Jiang; Wen-Cheng Yen; Chieao-Wei Hsiao

In this article, a new device structure called the neuron-bipolar junction transistor (/spl nu/BJT) was presented. It has been successfully applied to the design of a silicon retina and large-neighborhood cellular neural networks (CNNs). The /spl nu/BJT-based smoothing array for the silicon retina has a simple and compact structure, which is suitable for the VLSI implementation. It can be integrated with other CMOS retinal signal processing circuits to form smart sensor systems.


international symposium on neural networks | 2003

A new structure of large-neighborhood cellular nonlinear network (LN-CNN)

Chiu-Hung Cheng; Sheng-Hao Chen; Li-Ju Lin; Kuan-Hsun Huang; Chung-Yu Wu

In this paper, a novel large neighborhood cellular nonlinear network (LN-CNN) structure is proposed and analyzed. The proposed LN-CNN structure can realize both A and B templates with more than two neighborhood layers without complex direct connections between neural cell and neighboring cells. In both A and B templates, the first layer defined by 4 neighboring cells located at the 4 corners of a diamond shape whereas the second layer is defined by 8 cells. In realizing the 12 template coefficients of the template, only 8 connections are required as compared to 12 connections in the conventional CNN structure. Thus the required chip area for synaptic connection can be reduced, Using the proposed LN-CNN structure, the LN-CNN functions, such as noise removing, Muller-Layer arrowhead illusion, and connected component detection, have been successfully realized and verified in Matlab simulations. The constraints on the realized templates and template coefficients in the third or higher layers are analyzed and discussed. Based upon the above successful simulation results, the application of the proposed LN-CNN structure to the design of LN-CNN universal machine (LN-CNNUM) is quite feasible. The related research will be conducted in the future.


international symposium on circuits and systems | 2002

A new pseudo-bipolar-junction-transistor (PBJT) and its application in the design of retinal smoothing network

Chung-Yu Wu; Huan-Chu Huang; Li-Ju Lin; Kuan-Hsun Huang

A new MOSFET circuit structure called the pseudo-BJT (PBJT) is proposed and analyzed in this work. This new structure mimics the function of the BJT, and it has advantages of smaller area and better process compatibility over the real BJT. The function of PBJT is verified to be similar to the real BJT via HSPICE simulation. Moreover, applications of the retinal smoothing network and the edge-extracting circuit using the PBJT structure are also demonstrated. The PBJT plays the role of the real BJT in both applications, and they are verified to be functionally correct via HSPICE simulations.


european solid-state circuits conference | 2003

A CMOS focal-plane rotation sensor with retinal processing circuit

Kuan-Hsun Huang; Li-Ju Lin; Chung-Yu Wu

In this paper, a CMOS focal-plane rotation sensor with the retinal processing circuit is proposed and implemented. The proposed rotation sensor has a polar structure and is selective to the angular velocity and direction (clockwise and counterclockwise) of the rotating images. The selected angular velocity depends on the frequency of an external clock signal, which can be precisely adjusted. In the proposed rotation sensor, there are 104 pixels, which form five concentric circles. The area of a single pixel is 91/spl times/84 /spl mu/m/sup 2/ with a fill factor of 20% whereas the chip area is 1812/spl times/1825 /spl mu/m/sup 2/ . It is found from the experimental results that the detectable angular velocity and illumination range of this rotation sensor are from 2/spl times/10/sup -2/ /spl pi//sec to 206 /spl pi//sec as well as from 0.91 lux to 366 lux under a contrast of 80%, respectively.


international conference on nanotechnology | 2002

A new two-layer quantum-dot large-neighborhood cellular nonlinear network (QLN-CNN) using quantum-dot cellular automata

Te-Chen Tsai; Min Sun; Li-Ju Lin; Kuan-Hsun Huang; Chiu-Hung Cheng; Chung-Yu Wu

A novel structure of QLN-CNN is proposed. The new structure of the QLN-CNN contains two layers of QCA array and introduces concepts of the A cloning templates, the B cloning templates, and the thresholds. The gene-decoding concept of CNNs is also used in this structure. Thus it operates more like real CNNs. In this paper, three CNN operations are proven to be achieved by this new structure through MATLAB simulations.


international conference on electronics circuits and systems | 2001

The design of CMOS real-time motion-direction detection chip with BJT-based silicon-retina sensors and correlation-based motion detection algorithm

Chung-Yu Wu; Kuan-Hsun Huang; Li-Ju Lin

In this paper, a new CMOS real-time motion-direction detector using the bipolar junction transistor (BJT)-based silicon retina is proposed and implemented. In the proposed design, a correlation-based algorithm is adopted to determine the motion direction of the object image projected on the chip, while the BJT-based silicon retina is adopted to enhance the capability of image acquisition and edge-extraction preprocessing. An experimental chip consisting of a 32/spl times/32 pixel array and peripheral arithmetic units is designed and fabricated using a 0.5 /spl mu/m single-poly-triple-metal CMOS process. The pixel size is 100/spl times/100 /spl mu/m/sup 2/ with a fill factor of 11.6%, while the total chip area is 4200/spl times/4000 /spl mu/m/sup 2/. The measurement results have verified the correct function of the fabricated chip. The measured optical dynamic range is 82 dB, the supply voltage is 5 V and the power consumption is 120 mW.

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Chung-Yu Wu

National Chiao Tung University

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Li-Ju Lin

National Chiao Tung University

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Chiu-Hung Cheng

National Chiao Tung University

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H.Z. Yang

National Chiao Tung University

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Hsin-Chin Jiang

National Chiao Tung University

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Huan-Chu Huang

National Chiao Tung University

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Min Sun

National Chiao Tung University

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Sheng-Hao Chen

National Chiao Tung University

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Te-Chen Tsai

National Chiao Tung University

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Wen-Cheng Yen

National Chiao Tung University

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