Kuang-Yao Cheng

Digital Enhanced V 2 -Type Constant On-Time Control Using Inductor Current Ramp Estimation for a Buck Converter With Low-ESR Capacitors

This paper proposes a new digital enhanced V2-type constant on-time control architecture for solving the ripple oscillation issues when using low-equivalent series resistance (ESR) capacitors in a buck converter. Instead of directly sensing the inductor current, an inductor current ramp estimator with the drift compensation is presented as adding a virtual ESR ripple to the output voltage. Only the input and output voltages are required to be sampled with analog-to-digital converters (ADCs) for estimating the inductor current ramp. Since the sampling rate and resolution requirements of ADCs for voltage sensing are usually less critical with compared to direct current sensing, the proposed digital control architecture is practical for low-cost applications. Besides, the limit-cycle oscillations due to the sampling effects can also be improved by using the estimated current ramp. Furthermore, the small-signal model of the proposed digital enhanced V2 control architecture is provided to design the estimated current ramp amplitude to stabilize the system and to optimize the system performance. The drift compensation effect is also analyzed in this paper. The effectiveness of the proposed control architecture with the current ramp estimator has been verified with simulation and experimental results by using an FPGA-based hardware platform.

Small-Signal Analysis and Optimal Design of External Ramp for Constant On-Time V

Recently, constant on-time V2 control, and its variety named constant on-time control, or constant on-time ripple-based control is more and more popular in industry products due to features of high light-load efficiency, simple implementation, and fast transient response. However, subharmonic oscillation occurs when using multilayer ceramic caps due to the lagging phase of the capacitor voltage relative to the inductor current. External ramp compensation is one simple solution to solve the instability issue. However, the characteristics of constant on-time V2 control with external ramp are not fully understood and no explicit design guidelines for the external ramp are provided. This paper investigates the small-signal characteristics of constant on-time V2 control with external ramp compensation by providing a factorized, easy-to-use small-signal model. The external ramp is a critical parameter because it directly affects the position and damping of two pairs of double poles. Based on this fact, design guidelines of the external ramp for optimal dynamic performance are provided. Moreover, the effect of duty cycle is investigated. Finally, the small-signal experimental results and load transient performance are presented to verify the small-signal analysis and proposed design guideline.

^{\bf 2}

This paper presents a digital hybrid ripple-based constant on-time control scheme for voltage regulator modules (VRMs). Due to the sampling effects of the digital implementation, the stability issue becomes worse than the analog ripple-based control schemes, especially when low-ESR decoupling capacitors are used as the output filter. In order to stabilize the system and to fulfill the output impedance requirement of adaptive voltage positioning (AVP), a hybrid ramp compensation strategy, which includes the external ramp and the estimated current ramp, is proposed. The small-signal model of the proposed architecture is derived to provide the design guideline for the ramp compensation gains and the number of output and decoupling capacitors. Besides, only low sampling-rate Analog-to-Digital Converters (ADCs) are required to sample the input voltage, the output voltage, and the average current making the proposed architecture compatible with the cost/complexity constraints of VRM applications. Simulation and experimental results show that the ripple-based control can achieve high-bandwidth performance, and the proposed digital control architecture can fulfill the AVP design requirements of single-phase VRMs.

Control With Multilayer Ceramic Caps

This paper presents the multi-phase hybrid ripple-based adaptive on-time control architecture for VRMs. Due to the ripple cancellation effects with multi-phase operations, ripple-based control may suffer from large jitter issues and instability issues when applying to VRMs with ceramic output capacitors. By utilizing the hybrid ripple concept, both inductor current ripple and compensated external ramp are fed back to the modulator to reduce jitter and improve stability. However, the system becomes more complicated with two different ramp compensations. A small-signal model is derived based on the describing function approach to analyze the proposed control architecture and to provide the design guideline for determining the external ramp compensations based on different load-line requirements. Moreover, a feedforward controller is presented to improve the reference tracking performance of the conventional ripple-based control. Both simulation and experimental results are given to show the effectiveness of the proposed control architecture for VRMs, and to show the fast load transient and fast reference tracking characteristic of the hybrid ripple-based control scheme.

Digital Hybrid Ripple-Based Constant On-Time Control for Voltage Regulator Modules

This paper presents a new enhanced V2-type constant on-time control architecture with digital implementations for solving the ripple oscillation issues when using small ESR capacitors in a buck converter. Instead of directly sensing the inductor current, an inductor current ramp estimator with the drift compensation is proposed as adding a virtual ESR ripple to the output voltage ripple. Only the input and output voltages are required to be sampled for the current ramp estimation. Hence the sampling-rate requirements for the analog-to-digital converters (ADCs) in the digital implementations are not critical. The limit-cycle oscillations due to the sampling effects can be improved by using the estimated current ramp with compared to the direct current sampling. Besides, the small-signal modeling of the digital enhanced V2 control architecture can provide the design guideline for choosing the current feedback gains. The effectiveness of the proposed control architecture and the current ramp estimator has been verified with simulation and experimental results.

Analysis of multi-phase hybrid ripple-based adaptive on-time control for voltage regulator modules

Constant-on-time V2 control is widely used in DC-DC buck converters. However, sub-harmonic oscillations occur in constant-on-time V2 control employing low-ESR caps. For digital constant-on-time V2 control, the instability issue is worse due to the sampling effect. In both cases, external ramp compensation is one simple solution to solve the instability issue, although the characteristic of constant-on-time V2 with external ramp is not fully understood. This paper provides design guidelines for external ramp by factorizing the previous small-signal model of analog constant-on-time V2 control. Then the design strategy of the external ramp is extended to digital constant-on-time V2 control. Moreover, the small-signal models between analog and digital constant-on-time V2 control are compared to reveal the sampling effect. The small-signal analysis is verified with simulation and experimental results.

Digital enhanced V 2 -type constant on-time control using inductor current ramp estimator for a buck converter with small ESR capacitors

This paper proposes a multi-phase constant on-time I2 control architecture with adaptive voltage positioning (AVP) for voltage regulators (VRs). By including both fast inner current loop and the slow outer current loop, fast load transient performance and accurate current control can be achieved. In addition, in order to overcome the current ripple cancellation effects over wide duty ratios for future microprocessors, external ramp compensation is added to the proposed control architecture. The small-signal model of the proposed architecture is derived to provide the AVP design guideline, and to understand the design constraints about ramp compensations designs for different operating phases. The Simplis simulation and experimental results are provided to show the good correlations of the derived small-signal model and the effectiveness of the proposed control architecture. The parasitic of the typical output capacitor bank for VRs has also been included in the Simplis simulation bench to predict the load transient performance precisely with different load frequencies.

Small-signal model analysis and design of constant-on-time V 2 control for low-ESR caps with external ramp compensation

This paper characterizes two digital V2 control schemes using for the buck converters with small-ESR capacitors based on the presented small-signal models. Due to the sampling effects of the analog-to-digital converters (ADCs), the digital V2 control system performances are not as good as the analog ones, even using the inductor current sensing feedback. The major issue is that in order to stabilize and to make the system well-damped, large external ramps or large current sensing gains are required. However, with such large ramp compensations, some benefits of the V2 control architecture, including the fast transients and the easily compensation, will be vanished. In this paper, a hybrid-ramp compensation concept is presented to improve the system performance. Both small-signal modeling analyses and simulation verifications are given. And the load transient experimental results with different ramp compensations are also shown in this paper.