Kue-hwan Sihn

Novel approaches to parallel H.264 decoder on symmetric multicore systems

Novel approaches to parallel H.264 decoder for symmetric multicore processors are presented. The basic partitioning of the decoder is coarse-grained and hybrid method of the data partitioning and functional partitioning. We investigate the performance bottleneck of the parallelized decoder, and propose two new approaches, software memory throttling and fair load balancing. The software memory throttling limits the number of cores involved in the parallel motion compensation to achieve better speedup and power-saving. The fair load balancing for deblocking filter reduces load imbalance caused by the conventional static partitioning method. From the evaluation on two different symmetric multicore platforms, proposed approaches show up to 24% of speedup when there is much bandwidth contention.

Analysis and Parallelization of H.264 decoder on Cell Broadband Engine Architecture

Emerging video coding technology like H.264/AVC achieves high compression efficiency, which enables high quality video at the same or lower bitrate. However, those advanced coding techniques come at the cost of more computational power. Developed with such multimedia applications in mind, the CELL broadband engine (BE) processor was designed as a heterogeneous on-chip multicore processor to meet the required high performance. In this paper, we analyze the computational requirements of H.264 decoder per-module basis and implement parallelized H.264 decoder on the CELL processor based on the profile result. We propose and implement a hybrid partitioning technique that combines both functional and data partitioning to avoid the dependencies imposed by H.264 decoder, and optimize it using SIMD instructions. Through experiments, the parallelized H.264 decoder runs about 3.5 times faster than the single core (PPE only) decoder, by using 1 PPE and 4 SPEs.

A statistical method of packet loss type discrimination in wired-wireless networks

We propose a novel method of packet loss type discrimination at the receiver in the network which includes error-prone wireless link. Former studies using receiver-side’s inter-arrival time make many mistakes when there are several streams on the network simultaneously. Our approach is based on statistical value of inter-arrival time of received packets, and is different from existing ones that only exploit current behavior of network. In simulation result, we show that our scheme is more accurate than the other scheme based on inter-arrival time for both cases that a single stream exists and that multiple streams exist in the network. Our scheme can be used for conventional TCP and TFRC congestion control mechanism as well as in-home AV streaming though wireless link.

Scene Text Recognition system using multigrain parallelism

We propose a Scene Text Recognition (STR) system for recognizing text contained in natural images. The system is comprehensive of all three steps of STR — text localization, text extraction and text recognition — making it easily applicable to mobile devices. The methods for each step are adopted and tuned from previous works to be more suitable for STR. Since STR is computationally intensive, in order to give faster results to the user, we seek to utilize the computing power of multicore processors. A multigrain parallelism method is proposed which varies the level of parallelism according to task properties and available resources during runtime. The proposed approach was tested on a set of natural scene images and an average speedup factor of 1.72 was achieved when run on a dual core processor. Our multigrain parallelism method can easily be applied to other complex image processing algorithms that work on various units of data.