Kumar Narendra

Stability analysis of microwave circuits

It is common knowledge that stability analysis is a critical step of RF design flow. Nowadays powerful CAD tools allow accurate simulation of the performances of microwave and RF circuits. But the prediction of instabilities giving rise to frequency divisions or spurious oscillations is still a challenge, especially for MMIC designs whose adjustment after fabrication is impossible. This paper presents a new tool for stability analysis of microwave circuits, valid for small-signal and large-signal regimes. The technique used in this tool allows to detect and determine the nature of oscillations, such as parametric oscillations in power amplifiers that can be for example function of the input drive signal. Knowledge of the type of oscillation mode facilitates the insertion of stabilization networks, with a better balance between the required oscillation avoidance and maintaining the original circuit performances. The integration of this tool in the design flow with commercial CAD tools will be presented.

Second harmonic reduction in broadband HF/VHF/UHF class E RF power amplifiers

Class E amplifier offers high efficiency approaching 100% for ideal case. This paper describes a topology to reduce second harmonic in a broadband parallel circuit class E power amplifier (PA). Drain efficiency > 60% and second harmonic < 40dBm across wide bandwidth (134–174MHz) is shown at power operation more than 5.5W.

Cascaded distributed power amplifier with non-identical transistors and inter-stage tapered impedance

A concept technique of cascaded distributed power amplifier (DPA) with non-identical transistors and controlled inter-stage tapered impedance for wideband applications is presented. The topology solves the gain peaking effect (expansion) at cut-off frequency and guarantees sufficient stability margins. The advantages of the proposed technique are explored analytically before prototype fabrication. At measurement level, 10 W output power, 32 dB gain and PAE (power-aided-efficiency) in excess of 15% are recorded from 70–2000 MHz. A good agreement between simulations and measurements was obtained.

A novel adaptive LDMOS power amplifier with constant efficiency for wide dynamic power levels control

This paper highlights the achievement of constant efficiency (power added efficiency, PAE) across wide output power levels for fixed amplitude constant envelope modulation. Power amplifier drain supply is adjusted while having a fixed load impedance network. Input RF drive to the power amplifier has to change according to the output power in order to maintain the PAE across a wide range of power levels. A novel idea of input RF drive adjustment to the power amplifier is presented. Due to the nonlinear behavior of the transconductance at lower drain voltages, class AB bias scheme is implemented. Constant PAE of 44 % (flatness of ±1 %) across 0.5 to 6.5 W is experimentally demonstrated for a LDMOS power amplifier for the frequency range 420 to 440 MHz. Theory and measurement results showed a good agreement.

High efficiency 600-mW pHEMT distributed power amplifier employing drain impedance tapering technique

4-stage distributed power amplifier (DPA) employing tapering the drain load networks to achieve high efficiency is reported. The active device with enhancement mode pHEMT (pseudomorphic High Electron Mobility Transistor) technology is used. Measurement results of 600 mW, 30 % of power-aided- efficiency (PAE) and gain of 10 dB is achieved within frequency range of 10-1800 MHz. Low supply voltage of 4.5 V is used for each device. Good agreement between measured and simulated results is obtained.

Impedance Adjustment for Constant Efficiency Power Amplifier Applying Stage Bypass Method

Maintaining high efficiency at high power level while improving efficiency at low power of a power amplifier is an important design criterion to be considered in two way radio systems. In this paper, a stage bypass scheme demonstrated constant efficiency of about 45 % and 41 % for low power (1 W) and high power (5 W), respectively. The work is extended by a novel idea of impedance adjustment incorporated into the stage bypass method. This idea allows constant efficiency over a wide range of power levels (1 to 5 W). We have demonstrated efficiency values of 37 to 52 % for the 1 to 2 W power range at frequency range from 430 to 450 MHz. Simulated and measured results show a good agreement.

Dual Fed Distributed Amplifier With Controlled Termination Adjustment

A new circuit and technique to extend the bandwidth of the Dual Fed Distributed Amplifier (DFDA) while preserving the improvement on efficiency performance in comparison to conventional distributed amplifiers (DAs) is presented. The theoretical analysis is described in detail, and a test vehicle is realized to demonstrate the effectiveness of the proposed method. Output power of ∼ 29 dBm, gain of 10 dB, covering a bandwidth from 100 to 800 MHz, with a PAE of 20– 45% is experimentally demonstrated. The results are compared with measured results of the conventional DA, demonstrating a significant improvement in bandwidth and efficiency.

Observing transistor voltage waveform in high efficiency class-E HF/VHF/UHF power amplifiers

Class E amplifiers were introduced by the Sokals in the 70s [1] and, since then, numerous applications where higher efficiency was one of the key issues have seen the light. In this work a review of some useful and simple techniques to observe the collector/drain voltage waveform of the device will be explained with examples. This work is really interesting for RF/MW high efficiency power amplifier designers because the included techniques can be directly extended to class D or class F.

Discrete component design of broadband impedance transforming filter for distributed power amplifiers

A new topology distr ibuted pow er amplifie r (DPA) is presented to maximize DC-RF conversion (i.e. for high output) [7]. The topology is featured by vectorially combined current sources when loading power transist ors into a distr ibuted output and input ne tworks using impe dance ter mination values gathe red by device load pull. Br oadband impe dance tr ansforming filter with Real Frequency Technique (RFT) i s pro posed to transform the DPA output impedance i.e. 12 Ω to 50 Ω termination over the frequency band of 100–2200 MHz.

Design and computer simulation of high efficiency broadband parallel-circuit Class E RF power amplifier with reactance compensation technique

Class E amplifier offers high efficiency aproaching 100% for an ideal case. This paper introduces a first practical implementation of a broadband Class E design combining a parallel circuit load network with reactance compensation technique. The novel broadband class E parallel circuit with reactance compensation has been investigated theoretically and experimentally. An efficient method of simulation technique using Harmonic Balance to predict the class E performance is presented as well. In measurement level, the drain efficiency of 74 % at operating power of 8 W and power flatness of 0.7 dB are achieved across bandwidth of 135 to 175 MHz with supply voltage of 7.2 V. Simulations were verified by measurements and good agreement was obtained.