L. Picolli

A Clock-Less 10-bit Pipeline-Like A/D Converter for Self-Triggered Sensors

In this paper, a novel 10-bit A/D converter based on a pipeline-like architecture specific for low-noise, self-triggered sensors, (e.g., X-rays and 7-rays spectrometry) is presented. The main innovative feature of the proposed A/D structure is the concept that, for a sampled input signal, a pipeline ADC may behave as a combinatorial logic and may operate without any timing signal (clock). The conversion is obtained asynchronously propagating the partial conversions and the residues through the various stages. This concept is validated by means of a prototype ADC fabricated in a standard 0.35 mum CMOS technology. The active area is 2.24 mm2, and it provides a conversion in 2.5 mus (i.e., it can operate with a 400 kS/s data rate) featuring an ENOB equal to 8.91.

Integrated microsystem with humidity, temperature and light sensors for monitoring the preservation conditions of food

This paper presents an integrated microsystem for tracing food information and monitoring its preservation conditions. The system embeds humidity, temperature, and light intensity sensors with the respective interface circuits and also an A/D converter. The target application of the microsystem is a smart label, which will include an RFID transponder for collecting energy and transmitting data, as well as a micro-battery for energy storage. The proposed microsystem, designed in a 0.18µm CMOS technology, achieves better than 0.5°C and 6W/m2 accuracy regarding temperature and light intensity respectively, while consuming less than 90µA with 1.8V supply. On-chip capacitor dielectric permittivity, based on Sylgarl 184 polymer, has been optimized for best relative humidity response at ambient temperature for the given microsystem.

A 90nm 8b 120Ms/s-250Ms/s pipeline ADC

A dual operating mode 8b, 1.1V, 120 MHz/250 MHz, 9.4 mW/22.8 mW pipeline ADC for Gb Ethernet applications is presented. Considering 60 MHz of signal bandwidth in both operating modes, the ADC achieves a peak SNDR of 44.1dB/40.7dB (7b/6.5b ENOB), featuring a minimum FoM of 0.84 pJ/conv at 120 MHz and 2.2 pJ/conv at 250 MHz. A 90 nm CMOS technology was used to integrate the ADC whose active area is 1.25 times 0.65 mm2.

A 1.0 mW, 71 dB SNDR, −1.8 dB FS input swing, fourth-order ΣΔ interface circuit for MEMS microphones

In this paper a large input swing integrated interface circuit for MEMS microphones is presented. It consists of an high impedance input buffer followed by a multi-bit (12-levels) analog second order ΣΔ modulator and a fully-digital single-bit fourth-order ΣΔ modulator. The circuit, supplied with 3.3V, exhibits a current consumption of 215 µA for the analog part and 95 µA for the digital part. The measured signal-to-noise and distortion ratio (SNDR) is 71 dB, with an input signal amplitude as large as −1.8 dB with respect to full-scale, obtained thanks to the use of a feed-forward technique, which relaxes the voltage swing requirements of the operational amplifiers. The test chip fabricated in a 0.35 µm CMOS occupies an area of 3 mm2 including pads.

A Clock-Less 10-bit Pipeline A/D Converter for Self-Triggered Sensors

In this paper a novel 10-bit pipeline A/D converter for low noise, self-triggered sensors is presented. The main innovative feature of the proposed A/D structure is the concept that a pipeline ADC may behave as a combinatorial logic and may operate without any timing signal (clock) in order to produce the conversion (assuming that a sampled signal is provided at the input). This concept is validated by the experimental results here reported. A prototype ADC has been fabricated in a standard 0.35mum CMOS technology, has an active area of 2.24mm2, provides a conversion in 2.5mus (400kS/s) and consumes 14mW from a 2.3V power supply

A 32-channel ASIC for X-Ray detectors

In this paper we present a 32-channel integrated circuit (ASIC) designed for a multi-anode silicon drift detector for X-ray imaging and spectroscopy (0.5 ÷ 100 keV). The ASIC includes 32 read-out front-end channels (ROC), each consisting of a low-noise preamplifier, a second-order RC-CR pulse shaper, a peak stretcher, an amplitude and a peak discriminator, as well as a reset and pile-up rejection circuit. The ASIC includes also a digital configuration register, supporting daisy-chain connection, for setting the ROC parameters for signal processing. At room temperature the equivalent noise charge is 18 e2212;rms and the linearity error is lower than ±5% over the complete input range. The ASIC has been designed in a 0.35-µm CMOS technology with a 3.3-V power supply. A single ROC occupies an area of 200 × 380 µm2. The area of the whole ASIC is 6500 × 2260 µm2 and the power consumption is 0.4 mW per channel.

A Fully-Integrated Multi-Sensor System for Food Tracing and Quality Certification Providing Temperature, Light Intensity, and Humidity Exposure History of Samples

This chapter is about the design and experimental characterization of an integrated prototype for tracing food preservation quality along the distribution chain by monitoring its environmental preservation conditions. The system includes humidity, temperature, and light intensity sensors with the respective interface circuits and an A/D converter. The target application of the microsystem is a smart tag including an RFID transponder for collecting energy and transmitting data, as well as a micro-battery for energy storage. The developed microsystem has been fabricated in a 0.18 μm CMOS technology and achieves better than 0.5 °C and 6 W/m2 accuracy for temperature and light intensity respectively, while nominally consuming less than 1 μA at 1.8 V supply. Chemical on-chip capacitor dielectric composition, based on Sylgarl 184 polymer, is being optimized for maximum sensitivity response in terms of permittivity with respect to air relative humidity, while further investigation about correlation between real food samples preservation and measured environmental parameters exposure history is being carried out.

A 1.6-GHz, 54-dB signal-to-noise and distortion ratio pipeline A/D converter

In this paper we present a 1.6-GHz pipeline A/D converter (ADC) for digital television and digital broadcast satellite. The ADC, designed in a standard 65-nm CMOS technology, achieves in simulation a signal-to-noise and distortion ratio (SNDR) of 54.3 dB (8.73 ENOB), over a signal bandwidth of 615 MHz. The ADC core consumes 430 mW from 1-V and 2.5-V power supplies. In order to achieve the required sampling frequency, the proposed ADC exploits a time-interleaved architecture with four paths. Each path consists of a 10-bit pipeline ADC with four stages (a 3.5-bit stage, a 1.5-bit stage, a 2.5-bit stage and a final 4-bit flash stage). Operational amplifier sharing is adopted in the last two stages for reducing the power consumption. The active area of the chip is 2.7 × 3.2 mm2.

Concept for an innovative wide-field camera for x-ray astronomy

The use of large-area, fine-pitch Silicon detectors has demonstrated the feasibility of wide field imaging experiments requesting very low resources in terms of weight, volume, power and costs. The flying SuperAGILE instrument is the first such experiment, adopting large-area Silicon microstrip detectors coupled to one-dimensional coded masks. With less than 10 kg, 12 watt and 0.04 m3 it provides 6-arcmin angular resolution over >1 sr field of view. Due to odd operational conditions, SuperAGILE works in the unfavourable energy range 18-60 keV. In this paper we show that the use of innovative large-area Silicon Drift Detectors allows to design experiments with arcmin-imaging performance over steradian-wide fields of view, in the energy range 2-50 keV, with spectroscopic resolution in the range of 300-570 eV (FWHM) at room temperature. We will show the concept, design and readiness of such an experiment, supported by laboratory tests on large-area prototypes. We will quantify the expected performance in potential applications on X-ray astronomy missions for the observation and long-term monitoring of Galactic and extragalactic transient and persistent sources, as well as localization and fine study of the prompt emission of Gamma-Ray Bursts in soft X-rays.

X-ray imaging and spectroscopy performance of a large area silicon drift chamber for wide-field x-ray astronomy applications

In the context of the design of wide-field of view experiments for X-ray astronomy, we studied the response to X-rays in the range between 2 and 60 keV of a large area Silicon Drift Chamber originally designed for particle tracking in high energy physics. We demonstrated excellent imaging and spectroscopy performance of monolithic 53 cm2 detectors, with position resolution as good as 30 μm and energy resolution in the range 300-570 eV FWHM obtainable at room temperature (20 °C). In this paper we show the results of test campaigns at the X-ray facility at INAF/IASF Rome, aimed at characterizing the detector performance by scanning the detector area with highly collimated spots of monochromatic X-rays. In these tests we used a detector prototype equipped with discrete read-out front-end electronics.