L. You

Vapor deposition of parylene‐F by pyrolysis of dibromotetrafluoro‐p‐xylene

Structural characteristics of poly(tetrafluoroparaxylylene) (PA‐F) films deposited directly from C6H4(CF2Br)2 precursor have been studied using Fourier transform infrared spectroscopy (FTIR) and x‐ray photoelectron spectroscopy (XPS). Zn was used as the catalyst and the vapor pyrolysis of precursor was carried out between 350 and 400 °C. It is shown that the FTIR and XPS spectra of the PA‐F films deposited from the precursor are comparable to those made from the conventional dimer route. Dissociation of the PA‐F films does not occur up to an annealing temperature of 500 °C. Both Zn and Br contaminants were observed in the XPS spectra. However, we found that the Br contamination disappears after annealing to an elevated temperature (≥350 °C), while Zn impurities still remain in the film.

Room temperature epitaxial growth of Ag on low‐index Si surfaces by a partially ionized beam

The room temperature growth of 1000–1500 A Ag films on HF‐dipped Si substrates is studied as a function of self‐ion (Ag+) energy during deposition. In all cases the films contained a mixture of epitaxial grains and randomly oriented (111) grains. The orientations observed were Ag(111)/Si(111) with both type A (Ag〈110〉//Si〈110〉) and type B (Ag〈110〉//Si〈114〉) twins; Ag(110)/Si(110) with Ag〈001〉//Si〈001〉; and Ag(100)/Si(100) with Ag〈011〉//Si〈011〉. All three constructions match three Si atomic rows with four Ag rows. As judged by the ratio of epitaxial to nonepitaxial grains, the strength of the epitaxy was seen to decrease in the order (111)≳(110)≳(100). Increasing the Ag+ ion energy during the deposition was generally seen to decrease this ratio. Annealing of the Ag/Si(100) films induced preferential (100) grain growth.

Growth of epitaxial Ag/Si films by the partially ionized beam deposition technique

The observation of room‐temperature epitaxy of vapor‐deposited thin Ag films on Si(111) accomplished under conventional vacuum conditions is reported. Epitaxy was also observed at 350 °C. The films were deposited using a partially ionized beam deposition system, and were typically 1500 A thick. Epitaxy was confirmed via pole‐figure analysis. Scanning electron microscopy revealed excellent surface flatness even for the room‐temperature films. Contrary to previous observations, the growth was found to proceed by the layer mode, even at the elevated temperature. This change in morphology is attributed to the enhanced density of nucleation sites due to the energetic ions.

Texture of vapor deposited parylene thin films

The texture of vapor deposited parylene (poly‐p‐xylylene) thin films on Si is measured using the x‐ray pole figure technique to quantify the crystalline portion. The as‐deposited sample is the monoclinic α phase where the (020) fiber texture component comprises 48% and the remaining 52% are randomly oriented crystallites. The sample annealed for 350 °C 12 h is hexagonal β phase with an (040) fiber texture component of 68%. The half‐width (ω) of the (040) fiber component of the β crystallites is within 25° of the substrate normal (fiber axis). In a β(040) oriented crystallite, the polymer chain is parallel to the Si substrate. This β fiber texture develops by polymer chain movement and rearrangement of the as‐deposited α fiber texture.

Correlation between copper diffusion and phase change in parylene

The parylene family of polymeric insulating materials is of interest in electronics because of its low dielectric constant and good sticking properties. It is vapor depositable at low temperatures. Copper is a good conductor and a suitable metal for an interconnection system. Consequently, the Cu/parylene system is a promising combination for multilayer interconnections and thin film packaging. To investigate one aspect of the feasibility of using these two materials for an interconnection scheme, the diffusion of copper into parylene at elevated temperatures has been investigated using the Rutherford back scattering technique. The chief findings of this paper are: 1. Detectable (RBS) Cu diffusion starts at ≥573 K. Higher temperature causes more diffusion as expected. 2. The α → Β-phase change is not the main source of the diffusion. 3. The copper deposited on the α-parylene does not diffuse even after extended anneals of six hours at 573 K. Thus, the copper-α-parylene interconnect system can have thermal budget allowance of more than six hour 4. The starting phase of the PA-n affects its diffusion resistant properties. Furthermore a thermal processing window showing a safe half hour of vacuum annealing at soldering temperatures has been demonstrated.

Vacuum deposition of nonlinear chromophore‐polymer composite thin films

Novel nonlinear composite thin films containing 4‐dialkylamino‐4’‐nitro‐stilbene (DANS) and Teflon AF 1600 have been deposited by vacuum evaporation techniques. Pure DANS thin film, due to its centrosymmetric crystal structure, does not exhibit any electro‐optic effect. However, composite thin films of DANS and Teflon AF 1600 with a DANS concentration of 5%–25% (by volume) do exhibit an electro‐optic effect after poling. Their electro‐optical coefficients are measured to be as large as 2.4 pm/V. X‐ray diffraction shows that these composite thin films are in an amorphous state as‐deposited as well as after poling. It is argued that the DANS molecules are in their molecular form embedded in the Teflon AF amorphous matrix, thereby allowing the effect of their large molecular hyperpolarizability to be detected. The characterization of the thin films using scanning electron microscopy is also presented.

Low Temperature Processing for Multilevel Interconnection and Packaging

The future high density multilevel interconnection and packaging requires that the combination of the insulator and conductor layers has a low RC value. Thermal stress and diffusion during processing are issues of great concern in the high density multilevel structures. The problem can be alleviated by a proper choice of materials and processes that do not require high temperature. In this paper we propose to use parylene and its derivatives (dielectric constant 2.3–2.6) as the possible interlayer dielectrics and Cu (bulk resistivity ∼1.7 μ Ω-cm) as the conductor. Parylene can be vapor-deposited and cured at room temperature. The metallization of Cu has been achieved at room temperature using the newly developed partially ionized beam deposition technique. This technique has been shown to grow high quality metal films with low resistivity at low substrate temperatures. The interaction between Cu and parylene, including adhesion and diffusion, is also discussed.

Room‐temperature epitaxial growth of Ag(110)/GaAs(100) films

Thin Ag films were deposited in a partially ionized beam vacuum system on undoped GaAs(100) substrates at room temperature. The x‐ray pole‐figure technique was used to characterize the crystal orientation. The epitaxial relationship observed was Ag(110)/GaAs(100) with Ag[100]//GaAs[110]. The epitaxy was achieved at a vacuum in the 10−6 Torr range with no in situ cleaning. The substrates were prepared only by a HF dip immediately prior to deposition.

Photonic multichip packaging (PMP) using electro-optic organic materials and devices

ABSTRACT The limitations ofmetal interconnections in MultiChip Modules (MCMs) are examined primarily with respect totheir bandwidth arid propagation loss. Comparison is made with the alternative ofemploying optical interconnections.Some of the technical issues which lie ahead to make a Photonic Multichip Package (PMP) possible are explored.Certain organic materials are identified as promising candidates for implementing optical interconnections. These arefound to be interesting because of their low deposition temperatures, and because they lend themselves to fabricationby techniques that are already finding acceptance for metal interconnections in thin film MCM manufacturing. 1. INTRODUCTION1.1 Limitations of Metal Interconnections In recent years, there has been an attempt to reduce the dimensions of the metal interconnections in multichippackaging, to cope with the increasing demand for more pinout imposed by advanced VLSI in an economical numberof wiring layers. This has led to the development of Thin Film MultiChip Modules (TFMCMs). In these packages,the wiring is fabricated by techniques resembling those used for the fine wires of semiconductor integrated circuits