Lahoucine Idkhajine
Cergy-Pontoise University
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Lahoucine Idkhajine.
IEEE Industrial Electronics Magazine | 2011
Eric Monmasson; Lahoucine Idkhajine; Mohamed Wissem Naouar
This article presents the benefits of using field-programmable gate array (FPGA)-based controllers for power electronics and drive applications. For this purpose, an algorithm perspective is first proposed, where it is stated that, depending on the intrinsic parallelism properties as well as level of complexity, it makes sense to implement each control algorithm on a specific hardware and/or software architecture to get the best performances in terms of execution time or the best ratio performance versus cost. Then, an application perspective is proposed where the constraints specifically linked to the control of power converters are discussed.
IEEE Transactions on Industrial Electronics | 2009
Lahoucine Idkhajine; Eric Monmasson; Mohamed Wissem Naouar; Antonio Prata; Kamel Bouallaga
The aim of this paper is to present a fully integrated solution for synchronous motor control. The implemented controller is based on Actel Fusion field-programmable gate array (FPGA). The objective of this paper is to evaluate the ability of the proposed fully integrated solution to ensure all the required performances in such applications, particularly in terms of control quality and time/area performances. To this purpose, a current control algorithm of a permanent-magnet synchronous machine has been implemented. This machine is associated with a resolver position sensor. In addition to the current control closed loop, all the necessary motor control tasks are implemented in the same device. The analog-to-digital conversion is ensured by the integrated analog-to-digital converter (ADC), avoiding the use of external converters. The resolver processing unit, which computes the rotor position and speed from the resolver signals, is implemented in the FPGA matrix, avoiding the use of external resolver-to-digital converter (RDC). The sine patterns used for the Park transformation are stored in the integrated flash memory blocks.
IEEE Transactions on Industrial Electronics | 2012
Lahoucine Idkhajine; Eric Monmasson; Amira Maalouf
The aim of this paper is to quantify the interest of using hardware field-programmable gate arrays (FPGAs) to implement complex control algorithms. As a benchmark, authors have chosen a sensorless speed controller for a synchronous motor. The estimation of the rotor position and speed is achieved using an extended Kalman filter (EKF), eliminating the need of their corresponding mechanical sensors. Due to the EKF complexity, such sensorless controller is systematically implemented in a software digital signal processor (DSP) device. The execution time is frequently evaluated to several tens or hundreds of microseconds. The motivation here is to prove that, when exploiting the treatment fastness of FPGAs (less than 6 μs ), it is possible to enhance the control bandwidth. To reach this objective, a comparison between the developed FPGA-based sensorless speed controller and its DSP-based counterpart is made. The same sensorless controller (with the same complexity) has been implemented in both cases. To prop up this comparison, simulation, hardware-in-the-loop, and experimental tests are presented.
IEEE Transactions on Industrial Informatics | 2013
Imen Bahri; Lahoucine Idkhajine; Eric Monmasson; Mohamed El Amine Benkhelifa
This paper aims to provide Hardware/Software (Hw/Sw) codesign guidelines for system-on-chip field-programmable gate array-based sensorless ac drive applications. Among these guidelines, an efficient Hw/Sw partitioning procedure is presented. This Hw/Sw partitioning is performed taking into account both the control requirements (bandwidth and stability margin) and the architectural constraints (e.g., available area, memory, and hardware multipliers). A nondominated sorting genetic algorithm (NSGA-II) is used to solve the corresponding multi-objective optimization problem. The proposed Hw/Sw partitioning approach is then validated on a sensorless control algorithm for a synchronous motor based on an extended Kalman filter. Among the nondominated implementation solutions supplied by the NSGA-II, those that are considered as the most interesting are synthesized. Their time/area performances after synthesis are compared with success to their predictions. In addition, one of these optimal solutions is also tested on an experimental setup.
conference of the industrial electronics society | 2009
Lahoucine Idkhajine; Eric Monmasson; Amira Maalouf
The aim of this paper is to present a fully FPGA (Field Programmable Gate Array) based Sensorless Controller for a Synchronous Motor (SM). The estimation of the rotor position and speed is achieved using an Extended Kalman Filter (EKF). The drive also incorporates a PI-based controller for stator currents and a hysteresis-based controller for rotor current. The objective of this work is to prove the ability of a FPGA to ensure the required performances in terms of execution time, consumed resources and sensorless control quality. The developed architecture of the EKF is presented and a discussion about the time/area performances is made. Some experimental results are provided in order to prove the reliability and the efficiency of the developed control system.
european conference on power electronics and applications | 2007
Kamel Bouallaga; Lahoucine Idkhajine; Antonio Prata; Eric Monmasson
Their importance and reliability make resolvers key building blocks in flight control and navigation dynamics. This paper gives an overview of the different synchronous demodulation methods, for such devices and lists advantages and drawbacks for each one. A particular attention is given to implantation in the same device of both analog to digital converter (ADC) and algorithm. This true system on a chip (SoC) solution is realized by the fusion field programmable gate array (FPGA) from Actel Company.
conference of the industrial electronics society | 2009
Amira Maalouf; Sandrine Le Ballois; Lahoucine Idkhajine; Eric Monmasson; Jean-Yves Midy; François Biais
The use of extended Kalman filter (EKF) as a velocity and position nonlinear observer for synchronous motors is a mature research topic. Notwithstanding, the application of EKF in the aircraft domain is still restricted due to the complexity of the systems. This paper presents a study for using an EKF to estimate the position and speed of a brushless exciter synchronous starter/generator in electrical aircrafts. This type of machine is commonly used in this domain due to its autonomy, robustness and dual functioning. In spite of the machine complexity and the critical choice of the EKF covariance matrices, the EKF observer presents satisfying simulation results in estimating the position and the velocity of the mentioned motor during the starting operation. This is promising for the implementation and its use in the aircraft domain.
IEEE Transactions on Industrial Electronics | 2016
Jean Sawma; Flavia Khatounian; Eric Monmasson; Lahoucine Idkhajine; Ragi Ghosn
Model-predictive control (MPC) is an advanced model-based control technique. It allows flexible control schemes with fast time responses. However, like most optimization-based control strategies, MPCs are usually computationally intensive and suffer from a lack of robustness toward parametric variations. The computational burden of these controllers is nowadays being relieved thanks to the progress of digital devices; however, the robustness is still a major issue that prevents the use of MPC controllers in some applications. Systems presenting slow and fast dynamics at the same time are usually controlled by cascaded control loops. MPC techniques are restricted to the control of inner loops, while outer loops use more robust control techniques. The aim of this paper is to provide MPC techniques for both the inner and outer loops of an active front-end rectifier. A first dual-MPC cascaded control shows the drawbacks of usual MPC techniques for outer loops. It is thereafter modified to achieve a robust cascaded dual-MPC that eliminates the variable resistive load parameter from the system dynamical model and formulates a new prediction model containing only known parameters and measurable quantities. Finally, a third method based on the previous one is also presented in order to reduce switching losses. Experimental results for the three methods are presented and compared with double precision offline software simulation results to validate the feasibility of the proposed techniques.
european conference on power electronics and applications | 2007
Lahoucine Idkhajine; Mohamed Wissem Naouar; Eric Monmasson; Antonio Prata
This paper presents the implementation of a current control for synchronous machine using the fusion field programmable gate array (FPGA) from Actel Company. This component integrates analog peripherals such as ADC and also flash memory blocks, in a single chip. The achieved implementation allows evaluating the efficiency and the integration capacity of a true system on a chip (SoC) solution. An overview of the fusion FPGA architecture is firstly given, followed by the description of the current control algorithm. In addition, this paper presents some experimental results enabling to illustrate the benefits of this fully integrated solution.
conference of the industrial electronics society | 2008
Lahoucine Idkhajine; Eric Monmasson; Amira Maalouf
This paper presents the implementation of a system on chip (SoC) controller for a synchronous machine using a fusion field programmable gate array (FPGA). This component integrates, in addition to an FPGA matrix, analog peripherals such as, analog to digital converter (ADC), analog prescalers and an analog multiplexer for multi-channel conversion. Thus, in such application and in order to improve the control quality, a compensation of the ADC non-linearity error is achieved. Moreover, sampling synchronization error (SSE) compensation is implemented in order to minimize the impact of the serialized conversion process. Besides this ADC errors compensation, and always in perspective to improve the control quality, the voltage source inverter (VSI) non-linearity error compensation is implemented. This VSI error is mainly due to the introduced dead time, to power switches turn-on/off delays and also to the voltage drops. Simulations and experimental results are given to illustrate the efficiency of the developed compensation methods.