Larry W. Shive

Surface Roughness of Silicon Wafers on Different Lateral Length Scales

We measured the surface roughness of three unpatterned Si wafers by four different instruments: atomic force microscope, wafer inspection station (based on light scattering), Nomarski optical microscope, and interferometric profiler. The root-mean-square surface roughness (R ms ) values vary between 1.2 A as measured by an atomic force microscope over a 1×4 μm area to 19.4 A as measured by an interferometric profiler over a 1.32 mm path length. To explain the observation that samples showing high roughness values when measured with one technique but low when measured with another technique, we discuss the lateral (within the surface plane) characteristics of the different methods and show that the experimental results are not contradictory

Impact of Thermal Processing on Silicon Wafer Surface Roughness

Very flat silicon wafers with nanometer scale roughness are important during semiconductor device patterning onto the wafer. Recent reports have shown that thermal processing at high temperature in H2 or H2-Ar mixtures may be used to reduce roughness of silicon wafers at short length scales such as 110μm. This paper reports the impact upon roughness of high temperature heat treatment in a diffusion furnace in mixtures of hydrogen and argon. Experiments show surface roughness is reduced during high temperature processing and is independent of argon or argonhydrogen processing environment for length scales in the range of 0.1-100μm.

Aluminum Reduction in SC1

RCA clean has evolved since 1965 [1]. Typically used before critical thermal steps, depositions/etches, or after strip operations, these solutions are robust and reliable. Stringent semiconductor demands of shrinking feature size, increased contamination sensitivity and cost pressure have led to cleaning projects that improve performance and reduce chemical usage. One of the sources of contamination is the process chemicals themselves, where wafers are exposed to chemicals for etching or cleaning. Concerns over contamination are compounded in wet benches where chemical baths are re-circulated for periods up to 24 hours. Metal impurities can arise from insufficiently pure chemicals or water, tanks, carriers, plumbing components, chemical containers, incoming wafers and handling equipment. Strict chemical, DIW and material specifications as well as dilute chemistry and reduced temperature have benefited the industry as a whole. Trends such as lower temperature/concentration SC1, and higher temperature/concentration SC2 have reached a point of diminishing returns for metal contamination reduction. In the same way, chemical and water purity are well below detection, so improvements are difficult to quantify.[2]

Indirect Ultra-Pure Water Metals Analysis by Extended Ion Exchange on a Silica Surface

Water purity is not taken for granted in the Semiconductor Industry. Ultra high purity water (UPW) is analyzed continuously in-line for particles and resistivity. Routine samples are automatically taken for total organic carbon (TOC), boron, silica and dissolved oxygen. Less routine analyses, such as metals, are done off-line. Metal content of UPW water is well below the detection limits of ICP-MS even with a pre-concentration step. As a result, metals content may vary in the water without being detected. These variations may affect device performance and yield while the root cause may go undetected.