Lars Press Petersen

Two-stage power factor corrected power supplies: the low component-stress approach

The discussion concerning the use of single-stage contra two-stage PFC solutions has been going on for the last decade and it continues. The purpose of this paper is to direct the focus back on how the power is processed and not so much as to the number of stages or the amount of power processed. The performance of the basic DC/DC topologies is reviewed with focus on the component stress. The knowledge obtained in this process is used to review some examples of the alternative PFC solutions and compare these solutions with the basic two-stage PFC solution.

Reduction of voltage stresses in buck-boost-type power factor correctors operating in boundary conduction mode

In this paper, a new converter is proposed for universal line PFC operated in boundary conduction mode. The proposed modified SEPIC enables the use of lower voltage rated semiconductors compared to other single-switch buck-boost derived topologies with a resulting performance comparable to the boost topology. The operation and the design procedure is described in detail and the proposed converter is experimental verified with a 210 V, 100 W prototype for the universal line input (90 Vac-270 Vac).

Ultrafast switching superjunction MOSFETs for single phase PFC applications

This paper presents a guide on characterizing state-of-the-art silicon superjunction (SJ) devices in the 600V range for single phase power factor correction (PFC) applications. The characterization procedure is based on a minimally inductive double pulse tester (DPT) with a very low intrusive current measurement method, which enables reaching the switching speed limits of these devices. Due to the intrinsic low and nonlinear capacitances in vertical SJ MOSFETs, special attention needs to be paid to the gate drive design to minimize oscillations and limit the maximum at turn off. This paper investigates the latest SJ devices in order to set a reference for future research on improvement over silicon (Si) attained with the introduction of wide bandgap devices in single phase PFC applications. The obtained results show that the latest generation of SJ devices set a new benchmark for its wide bandgap competitors.

Design of a 300-W Isolated Power Supply for Ultrafast Tracking Converters

This paper presents the design of a medium-power-rating isolated power supply for ultrafast tracking converters and MOS-gate driver circuits in medium- and high-voltage applications. The key feature of the design is its very low circuit input-to-output parasitic capacitance, which maximizes its immunity from noise due to fast changes in voltage. The converter is a voltage-controlled current source, utilizing a transformer with extremely low interwinding parasitic capacitance, which is achieved by separating the windings by a significant distance. Experimental measurements show that an overall circuit input-to-output parasitic capacitance of 10 pF in a 300-W prototype can be achieved. The circuit input-to-output capacitance per watt is therefore 30 times lower than that of existing approaches. A mathematical model of the interwinding capacitance of the proposed transformer, circuit analysis, and experimental results are provided to prove the feasibility of the converter.

Characterization and evaluation of 600 V range devices for active power factor correction in boundary and continuous conduction modes

Traditional characterization of semiconductors switching dynamics is performed based on clamped inductive load measurements using the double pulse tester (DPT) configuration. This approach is valid for converters operating in continuous conduction mode (CCM), however in boundary conduction mode (BCM), if valley switching detection is used, the amount of energy recovered from the semiconductor output capacitance and the converter switching frequency need to be accurately calculated. This paper presents a characterization and evaluation procedure for conventional power factor correction circuits operating in CCM and BCM.

Practical investigation of the gate bias effect on the reverse recovery behavior of the body diode in power MOSFETs

This work considers an alternative method of reducing the body diode reverse recovery by taking advantage of the MOSFET body effect, and applying a bias voltage to the gate before reverse recovery. A test method is presented, allowing the accurate measurement of voltage and current waveforms during reverse recovery at high di/dt. Different bias voltages and dead times are combined, giving a loss map which makes it possible to evaluate the practical efficacy of gate bias on reducing the MOSFET body diode reverse recovery, while comparing it to the well known methods of dead time optimization. A selection of 60V devices for synchronous rectification are compared for their suitability for gate bias, while a selection of 600V devices are compared for the efficacy of gate bias for the zero voltage transition converter application. The results show that many of the tested devices benefit from greatly reduced reverse recovery after the application of gate bias.

Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction Applications

This paper examines different winding strategies for reduced capacitance inductors in active power factor correction circuits (PFC). The effect of the parasitic capacitance is analyzed from an electro magnetic compatibility (EMI) and efficiency point of views. The purpose of this work is to investigate different winding approaches and identify suitable solutions for high switching frequency/high speed transition PFC designs. A low parasitic capacitance PCB based inductor design is proposed to address the challenges imposed by high switching frequency PFC Boost converters.

High efficiency isolated DC/DC converter inherently optimized for fuel cell applications

The isolated full-bridge boost converter has been suggested as the best choice for fuel cell applications. Comparisons have been carried out in the literature using both stress factors and experimental verified designs to determine the optimal converter. Never the less, this paper suggests a different topology not previous used for fuel cell applications with some clear advantages. Taking into account the I-V characteristics of the fuel cell only emphasized the performance of the proposed converter and reveals its self as an optimal candidate for the fuel cell application.

A comparison between boundary and continuous conduction modes in single phase PFC using 600V range devices

This paper presents an analysis and comparison of boundary conduction mode (BCM) and continuous conduction mode (CCM) in single phase power factor correction (PFC) applications. The comparison is based on double pulse tester (DPT) characterization results of state-of-the-art superjunction devices in the 600V range. The measured switching energy is used to evaluate the devices performance in a conventional PFC. This data is used together with a mathematical model for prediction of the conducted electromagnetic interference (EMI). This allows comparing the different devices in BCM and CCM operation modes and evaluating the performance as a function of the PFC power density and efficiency.

Evaluation of 600V superjunction devices in single phase PFC applications under CCM operation

This paper presents a power density/efficiency evaluation in single phase power factor correction (PFC) applications operating in continuous conduction mode (CCM). The comparison is based on semiconductor dynamic characterization and a mathematical model for prediction of the conducted electromagnetic interference (EMI). The dynamic characterization is based on a low inductive double pulse tester (DPT). The measured switching energy is used in order to evaluate the devices performance in a conventional PFC. This data is used together with the mathematical model for prediction of the conducted electromagnetic interference. The method allows comparing different devices and evaluating the performance as a function of the PFC power density and efficiency.