Laurie E. Calvet

Growth and characterization of aligned carbon nanotubes from patterned nickel nanodots and uniform thin films

Microstructures of well-aligned multiwall carbon nanotubes grown on patterned nickel nanodots and uniform thin films by plasma-enhanced chemical vapor deposition have been studied by electron microscopy. It was found that growth of carbon nanotubes on patterned nickel nanodots and uniform thin films is different. During growth of carbon nanotubes, a nickel particle sits at the tip of each nanotube, and its [220] is preferentially oriented along the plasma direction, which can be explained by a channeling effect of ions coming into nickel particles in plasma. The alignment of nanotubes is induced by the electrical field direction relative to substrate surface.

Transport spectroscopy of single Pt impurities in silicon using Schottky barrier MOSFETs

We investigate low temperature electron transport in silicon Schottky barrier metal-oxide-semiconductor field-effect transistors (MOSFETs), which consist of PtSi metallic source/drain electrodes. Measurements are made on approximately 23 inversion layers and resonances attributed to single impurities close to the metal/semiconductor interface are observed. We ascribe these impurities to Pt atoms that have diffused into the semiconductor channel from the contacts.

On the Physical Behavior of Cryogenic IV and III–V Schottky Barrier MOSFET Devices

The physical influence of temperature down to the cryogenic regime is analyzed in a comprehensive study and the comparison of IV and III–V Schottky barrier (SB) double-gate MOSFETs. The exploration is done using the Synopsys TCAD Sentaurus device simulator and first benchmarked with experimental data. The important device physics of both SB-MOSFETs and conventional MOSFETs are reviewed. The impact of temperature on device performance down to the liquid-nitrogen regime is then explored. We find reduced drive currents in SB-MOSFETs fabricated on small effective mass materials and that SB lowering can significantly improve SB-MOSFETs, especially at low temperatures.

Simulation framework for barrier lowering in Schottky barrier MOSFETs

In this paper we present a simulation framework to account for the Schottky barrier lowering models in SB-MOSFETs within the Synopsys TCAD Sentaurus tool-chain. The improved Schottky barrier lowering model for field emission is considered. A strategy to extract the different current components and thus predict accurately the on- and off-current regions are adressed.

Low noise all-oxide magnetic tunnel junctions based on a La0.7Sr0.3MnO3/Nb:SrTiO3 interface

All-oxide magnetic tunnel junctions with a semiconducting barrier, formed by the half-metallic ferromagnet La0.7Sr0.3MnO3 and n-type semiconductor SrTi0.8Nb0.2O3, were designed, fabricated, and investigated in terms of their magneto-transport properties as a function of applied bias and temperature. We found that the use of the heavily Nb-doped SrTiO3 as a barrier results in significant improvement in the reproducibility of results, i.e., of large tunnel magnetoresistance (TMR) ratios, and a spectral noise density reduced by three orders of magnitude at low temperature. We attribute this finding to a considerably decreased amount of point defects in SrTi0.8Nb0.2O3, especially oxygen vacancies, compared with the conventional insulating SrTiO3 barrier.

Sleep stage classification with stochastic Bayesian inference

The design of electronic circuits that can realize Bayesian inference is an important goal for exploiting machine learning in a fast and efficient way. We recently developed a novel architecture based on stochastic computation with Muller C-elements that can realize a circuit level naïve Bayes inference. This technique can be implemented using low power nanodevices exhibiting faults and device variations. Here we show how a more complex classification problem can be transformed into a simple circuit using this framework where an effective classification can be obtained with a minimal amount of information. This suggests that substantially smaller spatial footprints for portable devices could ultimately be achieved.