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Dive into the research topics where Lautaro D. Salazar is active.

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Featured researches published by Lautaro D. Salazar.


IEEE Transactions on Power Electronics | 1994

PSPICE simulation of three-phase inverters by means of switching functions

Lautaro D. Salazar; G. Joos

Static power converters can be analyzed by means of widely available circuit simulation software packages such as PSPICE. However, they are usually modeled as a set of real switches, which results in long execution times and possible convergence problems in the case of complex circuits. This paper proposes macromodels to simulate three-phase power converters on such packages. The proposed macromodels are based on converter switching functions rather than actual circuit configuration, and they are suited for steady state and large signal transient analysis at system level. In this approach, voltage source inverters (VSI), current source inverters (CSI), and controlled rectifiers (CR) are simulated as multiport networks avoiding the physical nonlinear micromodels of the power switches. Computer memory and the run-times required for the simulation are thereby minimized. Complete examples of VSI, CSI and CR, with different PWM techniques, are given with specific reference to the PSPICE software to illustrate the effectiveness of the proposed models. >


power electronics specialists conference | 1995

High performance direct frequency converters controlled by predictive current loop

Eduardo P. Wiechmann; Ariel R. Garcia; Lautaro D. Salazar; Jose Rodriguez

Two predictive space-vector control strategies for direct-frequency converter (DFC) structures are presented. Both algorithms require output-current feedback in order to decide the next best state of the power converter. The performance of the control techniques is compared with a high-performance fictitious-link DFC. Computer simulation using Microsim PSpice 5.3 is used to examine the operation of the DFC converter algorithms. The evaluation is performed for a wide-operational output frequency and includes input/output-voltage ratio, commutation frequency, input-current balance, input-current total harmonic distortion (THD) and input power factor. From these results, the high performance exhibited by the proposed algorithms is verified.


IEEE Transactions on Industrial Electronics | 1990

A high-frequency two-switch forward converter with optimized performance

Lautaro D. Salazar; P.D. Ziogas

The analysis and design of a high-frequency two-switch forward converter topology with transformer flux balancing and extended duty cycle capability are presented. To improve converter performance, an auxiliary circuit connected in parallel with each power switch is proposed. This auxiliary circuit uses a low-power switch or a nonlinear resistor connected in series with a capacitor. As a result, the DC component of the magnetizing current is minimized, and the converter provides the means of recovering the energy associated with the parasitic inductances of the circuit components. Thus, higher than usual efficiency and higher operating frequencies are obtained. Experimental results are presented for a 4 kW, 40 kHz prototype unit. >


applied power electronics conference | 1990

Design oriented analysis of two types of three phase high frequency forward SMR topologies

Lautaro D. Salazar; P.D. Ziogas

Two forward switch mode rectifier (SMR) topologies utilizing a high-frequency, three-phase transformer core are proposed. These topologies are suitable for high-power (above 10 kW), high-frequency (above 20 kHz) applications where small volume and quiet operation are of critical importance. In addition to the detailed analysis, key design information and a significant amount of simulated data are included.<<ETX>>


IEEE Transactions on Power Electronics | 1989

A single-ended SMR converter topology with optimized switching characteristics

Lautaro D. Salazar; P.D. Ziogas

The analysis and design of an improved single-ended switched-mode rectifier (SMR) converter topology is presented. The novel feature of this topology is a nondissipative LC-type subcircuit which provides transformer flux balancing and improves converter efficiency. This is achieved by minimizing switching losses and by returning the energy stored in the transformer leakage and circuit stray inductances to the source and the load. Theoretical predictions and SMR converter design procedures are verified experimentally on a 1 kW 20 kHz prototype circuit. >


power electronics specialists conference | 1987

A single ended SMR converter topology with optimized switching characteristics

Lautaro D. Salazar; P.D. Ziogas

The analysis and design of an improved single-ended SMR converter topology is presented in this paper. The novel feature of this topology is a nondissipative L-C type of sub-circuit which provides transformer flux balancing and improves converter efficiency. This is achieved by minimizing switching losses and returning to the source the energy stored in the transformer leakage and circuit stray inductances. Theoretical predictions and SMR converter design procedure are verified experimentally on a 1 kVA 20 kHz prototype circuit.


power electronics specialists conference | 1990

A novel current assisted output voltage control technique for switch-mode-rectifier converters

Lautaro D. Salazar; P.D. Ziogas

A novel current-assisted voltage control technique for high-power switch-mode rectifier converters is proposed. This technique implements a fast-forward AC current loop by sensing the current through the output filter capacitor. The control loop forces the AC current component of the output filter inductance to be synchronized with a symmetrical triangular reference waveform. As a result, the converter behaves like a fixed-frequency current-regulated voltage source with a low output impedance and an increased bandwidth. The authors present the analysis for the proposed control technique, provide key design equations and give simulation results that confirm the theory.<<ETX>>


applied power electronics conference | 1992

On the minimization of switching losses in DC-DC boost converters

Lautaro D. Salazar; P.D. Ziogas; G. Joos

A high-frequency snubber circuit is proposed for a zero-voltage-switched (ZVS) single-switch pulse-width-modulated (PWM) boost converter. It is shown to be effective in reducing switching losses during turn-off in high-voltage applications. The lossless snubber subcircuit consists of an LC resonant circuit and two diodes. The resonant capacitor of this LC circuit is parallel with the switch and discharges directly through the load, thus providing lossless switching and increasing the input-output DC gain of the converter. Experimental verification has shown a better efficiency (5% higher at 2 kW output power) and an increased output-input DC gain (15% to 20%) compared with a similar standard boost converter with a diode-resistance-capacitor (DRC) snubber circuit. No extra switch or special resistor is required to remove the energy of the snubber capacitor.<<ETX>>


IEEE Transactions on Industrial Electronics | 1990

A high-frequency forward DC/DC converter topology with transformer flux balancing capability

Lautaro D. Salazar; P.D. Ziogas

The analysis and design of a high-frequency forward DC/DC converter topology with transformer flux balancing capability is presented. The converter utilizes a main switch for load current commutation and an auxiliary switch for transformer flux balancing. The topology provides a means of recovering the energy associated with the parasitic inductances of the circuit components, thus yielding high efficiency and allowing for high operating frequencies. Experimental results are presented for a 1 kW, 20 kHz prototype unit.<<ETX>>


power electronics specialists conference | 1992

A low loss switching PWM CSI

Lautaro D. Salazar; G. Joos; P.D. Ziogas

A low-loss soft-switching CSI topology, consisting of two parallel switches with a midpoint connected capacitor, is proposed. The structure accomplishes zero voltage switching during turn-off without any additional snubber circuit. It is well suited for high power applications requiring the use of two parallel switches. An analysis and design procedure are presented. Simulation results confirm the feasibility of the topology.<<ETX>>

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G. Joos

Concordia University

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