Lena Peterson
Chalmers University of Technology
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Publication
Featured researches published by Lena Peterson.
IEEE Journal of Solid-state Circuits | 1997
William C. Athas; Nestoras Tzartzanis; Lars Svensson; Lena Peterson
We describe AC-1, a CMOS microprocessor that derives most of its operating power from the clock signals rather than from dc supplies. Clock-powered circuit elements are selectively used to drive high-fan-out nodes. An inductor-based, all-resonant clock-power generator allows us to recover 85% of the clock-drive energy. The measured top frequency for the microprocessor was 58.8 MHz at 26.2 mW. The resulting overall decrease in dissipation ranges from four to five times at clock frequencies from 35 to 54 MHz. We also compare the performance of the processor to a reimplementation in static logic.
IEEE Journal of Solid-state Circuits | 2000
W. Athas; Nestoras Tzartzanis; W. Mao; Lena Peterson; R. Lal; K. Chong; Joong-Seok Moon; Lars Svensson; M. Bolotski
We describe the design and implementation of a 16-bit clock-powered microprocessor that dissipates only 2.9 mW at 15.8 MHz based on laboratory measurements. Clock-powered logic (CPL) has been developed as a new approach for designing and building low-power VLSI systems that exploit the benefits of supply-voltage-scaled static CMOS and energy-recovery CMOS techniques. In CPL, the clock signals are a source of ac power for the other large on-chip capacitive loads. Clock amplitude and waveform shape combine to reduce power. By exploiting energy recovery and an energy-conserving clock driver, it is possible to build ultra-low-power CMOS processors with this approach. We compare the CPL approach with a conventional, fully dissipative approach for a processor with a similar ISA and VLSI architecture which was designed using the same set of VLSI CAD tools. The simulation results indicate that the CPL microprocessor would dissipate 40% less power than the conventional design.
international solid-state circuits conference | 2000
Athas; Nestoras Tzartzanis; W. Mao; K. Chong; Lena Peterson; M. Bolotski
This paper describes a 16 b clock-powered microprocessor that dissipates only 2.9 mW at 15.8 MHz from laboratory measurements. Clock-powered logic (CPL) has been developed as a new approach for designing and building low-power VLSI systems. In CPL, the clock signals serve as a source of ac power for the large on-chip capacitive loads. By exploiting adiabatic charging and an energy conserving clock driver, it is possible to build ultra-low-power CMOS processors with this approach. Previously, a CPL processor was demonstrated in a 0.5 /spl mu/m n-well CMOS process. Laboratory measurements confirmed that it was possible and practical to recover and reuse large amounts (upwards of 80%) of the on-chip capacitive energy for a 16 b pipelined general-purpose CMOS processor. The measurements and simulation data analysis also pointed out some of the shortcomings of the original design approach which limited the speed, voltage scalability, and robustness of the processor.
international conference on microelectronics | 2015
Lars Svensson; Lena Peterson
We describe a system-level mixed-signal design course aimed at MSc-level students of embedded-system design. In order to cover a broad area and to reach students with varying backgrounds, we avoid detailed circuit-level discussions in favor of considerations of trade-offs at the system level. Following constructive-alignment principles, the course is built around a lab series which illustrates the fundamental topics covered. Two unusual features are the two-phase lab report submission and the dual oral/sit-down exams. Both features are generally appreciated by the students and contribute to a high pass/fail ratio and excellent student satisfaction.
7th International CONCEIVE DESIGN IMPLEMENT OPERATE Conference (CDIO2011) | 2011
Marie Bernelo; Sofia Honsberg; Anette Järelöv; Jörgen Blennow; Lena Peterson
Our hypothesis is that an increased focus on engineering students’ personal development in the curricula will increase their motivation, academic performance and teamwork. With this starting point we have developed the EDIT model for personal development aimed at the engineering students in the 5-year EE, CE and SE programs at Chalmers University of Technology. The EDIT model comprises the topics and the process and timing of the delivery in the curricula at the bachelor level. It is based on behavior-scientific theories and on 40 years of experience in guiding engineering students at Chalmers. The fundamental concept for the model is that introspective knowledge gives extrovert ability. It comprises four topics: Motivation and learning, Teamwork, Leadership, Career and professional life, and a complementary reflection package. Based on motivational theory and pedagogical literature, we discuss why we have selected these topics and how they should be implemented in the curricula and syllabi to facilitate the development of the students. We argue that these topics should be placed in a context and at a time that makes them meaningful to the students. We give practical examples from the project test implementation and discuss practical issues that are likely to hinder the long-term success. In conclusion, we find that there is some evidence from our experiments that motivation and teamwork is improved. The possible effect on academic performance is so far very hard to assess.
Archive | 2006
William C. Athas; Nestor Tzartzanis; Weihua Mao; Lena Peterson
Journal of the American Chemical Society | 2006
Jon Sinclair; Daniel Granfeldt; Johan Pihl; Maria Millingen; Per Lincoln; Cecilia Farre; Lena Peterson; Owe Orwar
european workshop microelectronics education | 2008
Kjell Jeppson; Lena Peterson; Lars Svensson; Lars Bengtsson; Per Larsson-Edefors
european workshop microelectronics education | 2010
Kjell Jeppson; Lena Peterson; Lars Svensson; Per Larsson-Edefors
Proceedings of 6th International CDIO Conference, Montreal, Canada | 2010
Anna Yström; Lena Peterson; Björn von Sydow; Johan Malmqvist