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Leo James Clark

IBM

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Publication

Featured researches published by Leo James Clark.

international solid-state circuits conference | 2007

Design of the Power6 Microprocessor

Joshua Friedrich; Bradley McCredie; Norman K. James; Bill Huott; Brian W. Curran; Eric Fluhr; Gaurav Mittal; Eddie K. Chan; Yuen H. Chan; Donald W. Plass; Sam Gat-Shang Chu; Hung Q. Le; Leo James Clark; John R. Ripley; Scott A. Taylor; Jack DiLullo; Mary Yvonne Lanzerotti

The POWER6trade microprocessor combines ultra-high frequency operation, aggressive power reduction, a highly scalable memory subsystem, and mainframe-like reliability, availability, and serviceability. The 341mm2 700M transistor dual-core microprocessor is fabricated in a 65nm SOI process with 10 levels of low-k copper interconnect. It operates at clock frequencies over 5GHz in high-performance applications, and consumes under 100W in power-sensitive applications.

Archive | 1999

Multiprocessor system in which a cache serving as a highest point of coherency is indicated by a snoop response

Ravi Kumar Arimilli; Leo James Clark; James Stephen Fields; Guy Lynn Guthrie

Archive | 1997

Software-managed programmable unified/split caching mechanism for instructions and data

Ravi Kumar Arimilli; Leo James Clark; John Steven Dodson; Jerry Don Lewis

Archive | 1991

Interlock for controlling processor ownership of pipelined data for a store in cache

Bradford Mason Bean; Anne Elizabeth Bierce; Neal Taylor Christensen; Leo James Clark; Steven Tyler Comfort; Christine C. Jones; Pak-Kin Mak

Archive | 1999

Optimized cache allocation algorithm for multiple speculative requests

Ravi Kumar Arimilli; Lakshminarayana B. Arimilli; Leo James Clark; John Steven Dodson; Guy Lynn Guthrie; James Stephen Fields

Archive | 1997

Software-managed programmable associativity caching mechanism monitoring cache misses to selectively implement multiple associativity levels

Ravi Kumar Arimilli; Leo James Clark; John Steven Dodson; Jerry Don Lewis

Archive | 1997

Optimizing a cache eviction mechanism by selectively introducing different levels of randomness into a replacement algorithm

Ravi Kumar Arimilli; Leo James Clark; John Steven Dodson; Jerry Don Lewis

Archive | 2005

Victim Cache Using Direct Intervention

Leo James Clark; James Stephen Fields; Guy Lynn Guthrie; Bradley McCredie; William J. Starke

Archive | 1999

Dynamically configurable memory bus and scalability ports via hardware monitored bus utilizations

Ravi Kumar Arimilli; Lakshminarayana B. Arimilli; Leo James Clark; James Steven Fields

Archive | 1999

Processor assigning data to hardware partition based on selectable hash of data address

Ravi Kumar Arimilli; Leo James Clark; John Steve Dodson; Guy Lynn Guthrie; Jerry Don Lewis

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Guy Lynn Guthrie

IBM

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Ravi Kumar Arimilli

IBM

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William J. Starke

IBM

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James Stephen Fields

IBM

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John Steven Dodson

IBM

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Jerry Don Lewis

IBM

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Derek Edward Williams

IBM

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Lakshminarayana B. Arimilli

IBM

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John Steve Dodson

IBM

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Jeffrey A. Stuecheli

IBM

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