Leonard R. Weisberg

Dislocation morphology in graded heterojunctions: GaAs1−xPx

The details of the formation, propagation, interaction, and densities of misfit dislocations are combined into a simple model quantitatively predicting dislocation densities for both abrupt and graded heterojunctions. Three key concepts are introduced: (1) misfit dislocations are segmented; (2) accordingly, they must give rise to a density of inclined dislocations, nI, that propagate through the growing layer; and (3) these inclined dislocations can bend in and out of any subsequently formed misfit plane to relieve the strain, and when bent in, serve as strain-relieving misfit dislocations. Thus, the value of nI is expected to remain constant with thickness. Also, nI is predicted to vary directly with the compositional gradient at the heterojunction. It is pointed out that there are two general classes of misfit dislocations, pure-edge and mixed and that their intersections, which cause the misfit dislocations to appear to bend within their plane, can be simply classified into three general types.Transmission electron microscopy was used for a comprehensive study of dislocations in a series of GaAs1−xPx heterojunctions prepared by a vapour phase growth technique. The main features of the above model were corroborated. The value of nI was found to be constant with growth distance as postulated, and in quantitative agreement with prediction, nI decreased from 4 × 107 cm−2 to 106 cm−2 as the compositional gradient decreased from 5% phosphorus/μm to 0.2% phosphorus/μm. Note that these values can far exceed the dislocation density of the substrates. Of particular significance, the inclined dislocations nI were found to propagate through a constant-composition region grown on top of a compositionally graded region, so that formation of the heterojunction must affect subsequently grown layers. Finally, it is shown that the misfit dislocations are, indeed, a combination of pure-edge and mixed, and all three postulated general interactions between these dislocations are shown to occur.

Behavior of lattice defects in GaAs

Abstract Single crystalline samples of GaAs grown by either the horizontal Bridgman (HB) or floating zone (FZ) technique have been annealed in the range 450 to 800°C, usually for periods of 16 hr in either the presence or absence of copper. Measurements of thermally stimulated currents, dark conductivity, density, and thermal conductivity were carried out on samples at various stages of annealing. It was found that very large concentrations of traps (> 10 19 cm −3 ) can be introduced by annealing, and these are identified as lattice defects. It is proposed that there are two defects, a donor and an acceptor which occur both paired and isolated in the lattice. When paired, their ionization energies are roughly 0.2 eV, and when isolated are roughly 0.5 eV. There is a fundamental difference between FZ and HB crystals in annealing characteristics and of greatest significance, at 700°C in the absence of copper, the concentration of defects increases in FZ samples and decreases in HB samples. This indicates that the defects are not present in thermal equilibrium. Instead, the defects are probably introduced by an accident of growth during the growth process, in a neutral form such as a precipitate or antiphase domain. Copper acts as a catalyst in enhancing the rate of defect annealing.

Permanent degradation of GaAs tunnel diodes

Abstract Permanent degradation of GaAs tunnel diodes is observed during normal operation at room temperature. This degradation is characterised by a large decrease in peak current, and is quantitatively correlated with a widening of the junction space charge region. The degradation is caused by the flow of junction recombination thermal current, and not tunneling current or excess current. The degradation rate diminishes with time, and decreases with decreasing temperature, but by less than two orders of magnitude from 300°K to 77°K ambient, indicating that the process probably is not thermally activated. It is shown that the degradation is not due to spurious heating effects, to diffusion, or to field-drift. Instead, it is attributed to the motion of recombination centers in the junction, induced by the formation of thermal spikes caused by the energy released by the recombination of carriers.

A Technique for Trap Determinations in Low‐Resistivity Semiconductors

A simple method is described to allow the use of thermally stimulated conductivity (TSC) measurements for low‐resistivity semiconductors. A p‐n junction or Schottky barrier is formed to provide the required high‐resistivity region. Trap populations can be inverted either by light or by changes in diode bias, but different traps may be seen in each case. The accuracy of trap concentration determinations is improved over ordinary TSC measurements since the gain is close to unity, and the active volume can be accurately found from capacitance measurements. The use of the method is demonstrated by the measurement of trap energies and densities in a sample of GaAs0.5P0.5 alloy with an electron concentration of about 1015 cm−3. Two main traps were seen, one at 0.20 eV from the conduction band and the other at 0.41 eV from the valence band, with concentrations of, respectively, 1×1014 cm−3 and 5×1014 cm−3. The method has also been successfully applied to silicon.

Stresses in Heteroepitaxial Layers: GaAs1−xPx on GaAs

A model is presented showing that there is a previously unrecognized source of stress in epitaxially grown heterojunction structures, specifically caused by a set of inclined dislocations formed by misfit dislocations which turn upwards at the heterojunction. This stress is indirectly related to the lattice mismatch at the heterojunction. For small lattice mismatch, the inclined dislocations are in an ordered array and cause the layer to bend upon removal from the substrate. For large lattice mismatch, the inclined dislocations are random so that there are only localized stresses and no net bending stress. A series of heterojunctions of GaAs1−xPx vapor grown onto GaAs were prepared, and the GaAs1−xPx constant‐composition layers were removed from the substrate. The bending of the layers observed and the dislocation morphologies revealed in the layers by transmission electron microscopy, demonstrate the validity of the above model. In GaAs0.8P0.2 grown on GaAs, the stress due to lattice mismatch exceeds tha...

AN OPTOELECTRONIC COLD CATHODE USING AN AlxGa1−xAs HETEROJUNCTION STRUCTURE

An efficient optoelectronic cold cathode has been made which includes a Si‐compensated AlxGa1−xAs electroluminescent diode covered with an absorbing p‐type GaAs layer having a negative electron affinity surface. This structure is designed to minimize current crowding in the vicinity of the Ohmic contact. An over‐all efficiency of 1.1×10−3 (current emitted into vacuum/diode current) has been achieved. This represents a factor of 102–103 improvement over previous p‐n junction or optically coupled cold cathode structures.

Electrical activity of copper in GaAs

Abstract It has been established that there is a one-to-one correspondence between the concentration of acceptors of 0.15 eV ionization energy and the concentration of copper introduced in GaAs between 600° and 1000°C. Early data on the solubility of copper in GaAs above 700°C have been confirmed. It has also proved possible to remove copper from GaAs by immersion in molten KCN.

Electroluminescent Diode Degradation Models

The general characteristics of gradual degradation of III-V compound electroluminescent diodes are reviewed. Seven possible degradation models are considered: high local temperatures, electric-field drift in the junction, electric-field drift in the bulk, optical flux effects, current drag, the extended-Longini mechanism, and the Gold-Weisberg mechanism. Only the last two mechanisms are found to be consistent with the data. At low current densities, the extended-Longini mechanism appears more reasonable, while at higher current densities the phonon-kick mechanism might be dominant. To further clarify the degradation characteristics, additional data is required at low temperatures and also at higher current densities.

ELECTRICAL TEST METHODS AS ANALYTICAL TOOLS

As we enter into the age of ultra-pure materials, the burden placed on the analytical scientist becomes increasingly difficult. It is no longer uncommon to require detection of impurities in the part-per-billion range. T o meet this challenge, the analyst desires analytical techniques that not only have this high sensitivity, but also need only a short time for analysis, (say 10 to 100 minutes), have a relative precision of 10 per cent, be nondestructive to the sample, and not require highly expensive apparatus ( <

Anomalous Mobility Effects in Some Semiconductors and Insulators

5000). These are exactly the virtues of four electrical test methods tha t have thereby become standard analytical tools in recent years for several classes of inorganic ultra-pure materials. These measurement methods are conductivity, Hall effect (for semiconductors), residual resistivity (for metals), and thermally stimulated currents (for insulators). On the other side of the coin are the inherent limitations of these methods. The most serious of these is that electrical methods do not, in general, identify impurities. Second, they measure the concentration of only the dominant impurities. This may be, in part, a blessing since one is usually interested in the most harmful impurities. Third, they provide only minimum impurity concentration, and further are blind to electrically inactive impurities. Finally, absolute concentration of impurities cannot usually be derived. Thus, electrical test methods are most useful when usual analytical techniques are employed as an adjunct. We are mostly concerned here with inorganic solids, although inorganic liquids are not excluded. These techniques have been used with great success especially for ultra-high purity materials, where most other methods fail. Typical ultra-high purity materials include water, germanium, and silicon (semiconductors), copper and gallium (metals), and GaAs and CdS (insulators). Appropriate measurement techniques, typical data, and results are presented below. The simplicity of the apparatus and interpretation will be manifest.