Liang Lin

Implementation of New CMOS Differential Stacked Spiral Inductor for VCO Design

A new type of silicon-based differential stacked spiral inductor (DSSI) was proposed in this letter, which was successfully implemented in the design of a cross-coupled differential voltage-controlled oscillator (VCO). The samples of DSSI and VCO were fabricated using standard CMOS 0.18 mum process. Based on the two-port S-parameters measured using standard deembedding procedure, the self-resonance frequency (fsr ) and -factor of the new and conventional DSSIs, frequency tuning range and phase noise of two VCOs are characterized and compared. It is demonstrated that, due to the reduction of parasitic capacitance in the new DSSI, its fsr is increased significantly, and further resulting in the evident increase of frequency tuning range of the VCO with smaller on-chip area occupied, as compared to the other new VCO design.

Study on ESD Effects of GaAs HBT Power Amplifiers for DCS/GSM Dual Band Handsets

Study on electrostatic discharge (ESD) impact on the GaAs HBT power amplifier (PA) in DCS/GSM dual band handsets is performed in this paper, which has been regarded as its main reliability issue accounting for most failures of radio frequency integrated circuits. In order to suppress the positive ESD impact on the PA in an effective but very economic way, a set of forward ESD diodes at its input port is replaced by the PN junction of GaAs HBT transistor in its first-stage. Alternatively, to introduce a set of thin film resistors (TFRs) at the front of a HBT transistor is necessary for improving the S11-parameter and stability of PA; however, their electrothermal breakdown possibilities do exist. Therefore, both performance degradation and breakdown events of several PA dies are measured for different ESD voltages described by the human body model, with different TFRs chosen for both DCS and GSM bands, respectively. Their transient temperature responses are also captured and compared for different ESD waveforms, which are predicted using the in-house developed algorithm based on the hybrid time-domain finite-element method.

Improvement in Cavity and Model Designs of LDMOS Power Amplifier for Suppressing Metallic Shielding Cover Effects

Some key technical issues are addressed for improving electromagnetic compatibility (EMC) design of metallic shielding cavity for achieving better RF performance of LDMOSFET-based power amplifier (PA). With the help of an Automation Testing Bench, its input-output responses are at first measured and compared, where an interactive influence between the PA and PCB is studied in detail. The internal and outer matching structures of LDMOSFET on the PCB are simulated using the commercial full-wave software HFSS. Perturbation theory is used to analyze the shielding cover effects with different package sizes and cavity heights sensitivity considered. Some guidelines for selecting suitable inner shielding structure and cavity height are given, and an improved model for both LDMOSFET and PA module is proposed and analyzed. Furthermore, it is integrated with the lumped-element circuit model of die and cosimulated using the software ADS 2013, and good agreement between the simulated and measured results is obtained. The most sensitive feedback path of electromagnetic interference inside the shielding cavity is characterized and a metallic isolation wall is introduced between the input (gate) and output (drain) of the LDMOSFET die for suppressing inner coupling effects. This research should be useful for the development of compact and miniaturized PA modules with our desired EMC performance.

Electrothermal-Stress Interactions of LDMOS FET Induced by DCI RF-Pulses

This paper studies the coupled electrothermal-stress interaction mechanisms of a laterally diffused metal oxide semiconductor field effect transistor under direct current injection radio frequency pulses. Based on the measured threshold breakdown power in the high power microwave experiment, an analytical thermal stress model has been derived. Furthermore, the finite element method is used to calculate the transient temperature and stress profiles in comparison with both analytical results and those from commercial software.

Performance Characterization of Circular Silicon Transformers

We have characterized performance of on-chip circular silicon transformers. The circular transformers were fabricated by the standard 0.18 mum CMOS process. We used measured two-port S-parameters, a de-embedding procedure, and simulated S-parameters derived from a lumped-element circuit model. We examined performance indicators of transformers such as quality factor (Q), maximum available gain (G max), coupling coefficient (kappa), and minimum noise figure (NF min) for various cases. We characterized all the parasitic capacitive and inductive effects. The results obtained are useful in the global optimization of high-performance transformers used in the design of certain radio-frequency integrated circuits.

An improved model of LDMOS power amplifier for suppressing metallic shielding cover effects

Shielding cover effects in LDMOS transistor are investigated in this paper. The internal and outer matching structures on the PCB are simulated using the commercial full-wave software HFSS. Under an Automation Testing Bench, the input-output responses of PA module are measured and compared. Finally, an improved scalable LDMOSFET PA model is proposed to predict three feedback path which give further guidance to design a good cavity structure and good alignment is obtained between measured and simulated results.

Electrothermal Effects on Performance of GaAs HBT Power Amplifier During Power Versus Time (PVT) Variation at GSM/DCS Bands

Power versus time (PVT) variation is one of the most important features for describing electrothermal performance of RF power amplifiers (PAs) for global system for mobile communication/digital cellular system bands. The PA sometimes produces high power at the first time slot and low power at the second time slot, which results in similar temperature variation caused by its self-heating effect. Therefore, both theoretical and experimental investigations are carried out for capturing electrothermal effects on the performance of GaAs-based heterojunction bipolar transistor (HBT) PAs. The temperature distribution over the PA die is obtained using our in-house developed finite-element method algorithm and a thermal infrared scanner, respectively. In particular, the PVT variation of the PA for a two time slot, as well as a four time slot (i.e., 75% of its operation time is in the “power on” state) case is studied in detail. Furthermore, an improved design for the GaAs HBT PA chip is performed, fabricated, and tested with its PVT variation suppressed effectively. This study should be very useful for the development of PAs for many wireless communications.

Shielding cover effects on the RF performance of LDMOSFET power amplifier for WCDMA application

Shielding cover effects on the RF performance of LDMOSFET power amplifier (PA) is investigated. In our measurement, the PA cover is made of aluminum, with its height adjusted from 8.4 to 14.4mm which are widely used in current wireless communication application. The input-output responses of several PA samples with cover are measured and compared for different cover heights. Both experiment and simulation show that as the cover height is reduced, the PA performance is degraded, but its power efficiency and linearity are not varied approximately. Further, it is found that, even the cover height is decreased, but through careful optimizing of its internal impedance matching networks consisting of multiple bonding wires, the PA performance can be improved effectively. This research can provide some useful design guidance for the development of compact and miniaturized PA module with high performance.

Capacitance extraction of on-chip circular stacked inductors

In this paper, we proposed a method to characterize the capacitive coupling effects in circular stacked inductors, which takes the non-overlapping between upper and bottom traces of different layers into account. Compared with the full-wave method and the analytical method with completely overlapping assumption, our method can predict self-resonant frequency (f/sub SR/) for on-chip circular stacked inductors used in RFICs more accurately.

Investigation on Failure Mechanisms of GaN HEMT Caused by High-Power Microwave (HPM) Pulses

This study aims at studying thermal and stress breakdown of gallium nitride (GaN) high-electron-mobility transistors (HEMTs) with a high-power microwave (HPM) pulse injected. A thermal breakdown model, depending on its pulse width and duty cycle, is proposed at first, and an equation is derived for calculating power threshold when both geometrical and material parameters of transistor are known. A series of GaN HEMT-based power amplifiers is designed and measured by using one special HPM system for characterizing their power-to-failure values, and the calculated ones are then fitted for further determining failure temperature of GaN HEMT. Further, electrothermal simulation is performed for capturing temperature and stress distributions over the structure, where a few correlations are observed between the simulated and calculated results. Finally, the crack area in the field plate of GaN HEMT is also characterized experimentally.