Libor Waszniowski

Formal verification of multitasking applications based on timed automata model

Abstract The aim of this paper is to show, how a multitasking application running under a real-time operating system compliant with an OSEK/VDX standard can be modeled by timed automata. The application under consideration consists of several non-preemptive tasks and interrupt service routines that can be synchronized by events. A model checking tool is used to verify time and logical properties of the proposed model. Use of this methodology is demonstrated on an automated gearbox case study and the result of the worst-case response time verification is compared with the classical method based on the time-demand analysis. It is shown that the model-checking approach provides less pessimistic results due to a more detailed model and exhaustive state-space exploration.

Timed automata approach to real time distributed system verification

This article deals with a distributed real-time application modelling by timed automata. The application under consideration consists of several processors communicating via controller area network (CAN): each processor executes an application that consists of tasks running under an operating system (e.g. OSEK) and using inter-task synchronization primitives. For such system, model checking algorithm implemented in a model checking tool (e.g. UPAALL) can be used to verify complex time and logical properties of the proposed model (e.g. end-to-end response time, state reachability, deadlock freeness). Since the proposed timed automata model contains more crucial details of the system behavior with respect to classical approaches to the response time analysis, the model checking approach provides less pessimistic results in many cases.

Case study on distributed and fault tolerant system modeling based on timed automata

This article presents the modeling of a distributed fault-tolerant real-time application by timed automata. The application under consideration consists of several processors communicating via a Controller Area Network (CAN); each processor executes an application that consists of fault-tolerant tasks running on top of an operating system (e.g. OSEK/VDX compliant) and using inter-task synchronization primitives. For such a system, a model checking tool (e.g. UPPAAL) can be used to verify the complex time and logical properties formalized as safety or bounded liveness properties (e.g. end-to-end response time considering an occurrence of a fault). The proposed model reduces the size of the state-space by sharing clocks measuring the execution time of the tasks.

Analysis of Real Time Operating System Based Applications

This text is dedicated to modelling of real-time applications running under multitasking operating system. Theoretical background is based on timed automata by Alur and Dill. As this approach is not suited for modelling pre-emption we focus on cooperative scheduling. In the addition, interrupt service routines are considered, and their enabling/disabling is controlled by interrupt server considering the specified server capacity. The server capacity has influence on the margins of the computation times in the application processes. Such systems, used in practical real-time applications, can be modelled by timed automata and further verified since their reachability problem and model checking of TCTL problem is decidable. Use of this methodology is demonstrated on the case study.

Integrated Environment for Embedded Control Systems Design

The motivation of our work is to make a design tool for distributed embedded systems compliant with HIS and AUTOSAR. The tool is based on Processor Expert, a component oriented development environment supporting several hundreds of microcontrollers, and Matlab simulink which is the de-facto standard in the rapid prototyping of the control applications but it does not have an adequate HW support. The objective is to provide an integrated development environment for embedded controllers having distributed nature and real-time requirements. Therefore we discuss the advantages of using an automatically generated code in the development cycle of the control embedded software. We present a developed block set and processor expert real-time target for Matlab real-time workshop embedded coder. The case study shows a development cycle for a servo control design.

Over-approximate model of multitasking application based on timed automata using only one clock

The aim of this article is to show, how a multitasking application running under real-time operating system compliant with OSEK/VDX standard can be modeled by timed automata. The application under consideration consists of several tasks, it includes resource sharing and synchronization by events. For such system, we use model checking theory based on timed automata and we verify time and logical properties of proposed model by existing model checking tools. Since a complexity of the model-checking verification exponentially grows with the number of clocks used in a model, the proposed model uses only one clock for measuring execution time of all modeled tasks.

Aircraft Control System Validation via Hardware-in-the-Loop Simulation

T HISNote presents experiences from the validation process of an aircraft control system—the yawdamper controller (YDC)with hydraulic actuators. The hardware-in-the loop (HIL) simulation on a hydraulic stand with a revolving platform and a loading force actuator was used in the validation process of this mechatronics system in the first step [1]. This Note extends the previous work by describing the next level of the validation process in which the YDC and actuators have been embedded into the aircraft where the interaction with the mechanical control system is validated by the HIL simulation. The yaw damper controller and the simulator are very briefly described and the practical experiences demonstrating the usefulness of the hardware-in-the loop simulation during detection of errors in the system components are mentioned. The yawdamper (YD) is a device directly coupledwith the aircraft rudder. It senses the yaw rate via a fiber optic gyro (FOG) and compensates oscillations via hydraulic actuators deviating the rudder. Even though it is designed to be fail-safe (it is disconnected from the ruder when a failure is detected) and the direct mechanical coupling of the rudderwith the pedals guarantee controllability of the aircraft when the YDC does not work, a malfunction of the YDC could have a serious effect on flight safety. Therefore, the validation of the whole system controlling the ruder must be carefully undertaken. HIL simulation is a popular validation method in many branches. The HIL simulator for an electrohydraulic flight control system has been described in [2]. HIL simulation has been used for the development of the antiskid braking system of the aircraft in [3] or for the flight-formation system [4]. HIL is also often used for development of control systems of unmanned aerial vehicles [5–9], and missiles [10]. Reference [11] presents a study of the performance of a fuel-cell powered unmanned aerial vehicles using HIL simulation of the aircraft inflight. HIL simulation is irreplaceable in the automotive industry and it is also very useful in power electronic controls, motor control, and energetic-component design and teaching. The rest of the Note is organized as follows. The YD is briefly described in Sec. II. Section III presents the HIL simulator. The validation process is described in Sec. IV. The concluding remarks are mentioned in Sec. V.

Design and Validation of the Flight Recovery Control System

The paper presents proof of concept design and validation methodology of the flight recovery control system. The flight recovery control system algorithm is based on the model predictive control. Adaptive control is considered for situations where the airplane changes its parameters during the flight. The acceptability of maneuvers automatically conducted by flight recovery control system by pilots can be validated in the hardware in the loop simulation on the aircraft stand with the projection of the pilot view from the cabin. Matlab Simulink is used for models and the control law design. A special block set has been designed for interface Simulink models to the hardware in the loop simulator.

Analysis of OSEK/VDX Based Automotive Applications

Abstract The aim of this article is to show, how an automotive real-time software application running under real-time operating system compliant with OSEK/VDX standard can be modelled by timed automata. The application under consideration consists of several basic or extended tasks, it includes resource sharing and synchronisation by events. For such system, model checking theory based on timed automata and implemented in model checking tools can be used for verifying complex time and logical properties of proposed model. Use of this methodology is demonstrated on the automotive case study. The automated transmission system and its control software running under OSEK compliant operating system are modelled and properties necessary for its proper function are verified by model checker UPP AAL.

Hardware in the Loop Simulation of FBW Components

The paper presents hardware in the loop simulator developed for validation of control algorithms and electro-hydraulic servo actuators designed for flight by wire control system of a small jet plane. The architecture and functionality of the flight by wire system is briefly described and requirements on validation tests to carry out on the hardware in the loop simulator are mentioned. The flight by wire control system under development consist of dual channel flight control computer and dual channel electronic control unite controlling dual channel electro hydraulic servo actuator with mechanical redundancy. It support several control modes as autopilot and recovery mode. An architecture and software and hardware components of the developed simulator and hydraulic stand are described. The simulator instrumentation is based on distributed peripherals communicating via CANopen industrial field bus. The real time simulation of the plane model is performed via an embedded computer with Power PC processor and Linux operating system. Matlab Simulink environment is used for development of the plane models and control algorithms and data visualization and evaluation. FlightGear, an open source flight simulator, is used for flight visualization. An example of hardware in the loop simulation test is presented.