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Lidia Warnes

Hewlett-Packard

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Publication

Featured researches published by Lidia Warnes.

Archive | 2008

Memory Module Having a Memory Device Configurable to Different Data Pin Configurations

Mark E. Shaw; Christian Petersen; Lidia Warnes

Archive | 2007

Rank sparing system and method

Lidia Warnes; Michael Bozich Calhoun; Dennis Carr; Teddy Lee; Dan Vu; Ricardo Espinoza-Ibarra

Archive | 2011

Parallel memory device rank selection

Lidia Warnes; Teddy Lee; Ricardo Espinoza-Ibarra; Dennis Carr; Michael Bozich Calhoun

Archive | 2007

Redundant memory to mask DRAM failures

Mark Q. Shaw; Larry J. Thayer; Chris Petersen; Lidia Warnes; Dheemanth Nagaraj

Archive | 2008

On-line memory testing

Lidia Warnes; Siamak Tavallaei

Archive | 2008

MEMORY MODULE INCLUDING VOLTAGE SENSE MONITORING INTERFACE

Dennis Carr; Michael Bozich Calhoun; Teddy Lee; Lidia Warnes; Dan Vu

Archive | 2009

Increasing the number of ranks per channel

Lidia Warnes; Dennis Carr; Michael Bozich Calhoun; Aaron R. Mandle

Archive | 2007

Communicating between a native fully buffered dual in-line memory module protocol and a double data rate synchronous dynamic random access memory protocol

Teddy Lee; Michael Bozich Calhoun; Dennis Carr; Ricardo Espinoza-Ibarra; Lidia Warnes

Archive | 2007

Serial connection external interface from printed circuit board translation to parallel memory protocol

Martin Goldstein; Hau Jiun Chen; Lidia Warnes

Archive | 2008

DIFFERENTIAL ON-LINE TERMINATION

Dennis Carr; Lidia Warnes; Dan Vu; Teddy Lee; Michael Bozich Calhoun

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Collaboration

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Dennis Carr

Hewlett-Packard

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Michael Bozich Calhoun

Hewlett-Packard

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Melvin K. Benedict

Hewlett-Packard

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Teddy Lee

Hewlett-Packard

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Ricardo Espinoza-Ibarra

Hewlett-Packard

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Andrew C. Walton

Hewlett-Packard

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Dan Vu

Hewlett-Packard

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Blaine D. Gaither

Hewlett-Packard

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Hau Jiun Chen

Hewlett-Packard

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Martin Goldstein

Hewlett-Packard

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