Lily P. Looi

Intel 870: a building block for cost-effective, scalable servers

Architects based the Intel 870 system architecture on the scalability port, a coherent system interconnect. The systems building-block approach lets a single chip set support a wide range of server segments.

Scalability port: a coherent interface for shared memory multiprocessors

The scalability port (SP) is a point-to-point cache consistent interface to build scalable shared memory multiprocessors. The SP interface consists of three layers of abstraction: the physical layer, the link layer and the protocol layer. The physical layer uses pin-efficient simultaneous bi-directional signaling and operates at 800 MHz in each direction. The link layer supports virtual channels and provides flow control and reliable transmission. The protocol layer implements cache consistency, TLB consistency, synchronization, and interrupt delivery functions among others. The first implementation of the SP interface is in the Intel/sup /spl reg// E8870 and E9870 chipset for the Intel Itanium/sup /spl reg//2 processor and future generations of the Itanium processor family.

Transitioning the Intel® next generation microarchitectures (nehalem and westmere) into the mainstream

Intel maintains pace of innovation and execution - Next generation performance - 32nm: Another Process Technology Breakthrough. Enabling Nehalem for every segment - Delivering outstanding Nehalem performance to mainstream desktops and laptop computers. Redesigning more efficient platforms - Best performance acrossIntel maintains pace of innovation and execution - Next generation performance - 32nm: Another Process Technology Breakthrough. Enabling Nehalem for every segment - Delivering outstanding Nehalem performance to mainstream desktops and laptop computers. Redesigning more efficient platforms - Best performance across all segments - Low power and better power management - Higher levels of integration all segments - Low power and better power management - Higher levels of integration.