Linda M. Koschier

Aluminum-induced crystallization of amorphous silicon on glass substrates above and below the eutectic temperature

The achievement of high-quality continuous polycrystalline silicon (poly-Si) layers onto glass substrates by using aluminum-induced crystallization is reported. The crystallization behavior of dc sputtered amorphous silicon on glass induced by an Al interface layer has been investigated above and below the eutectic temperature of 577 °C. Secondary electron micrographs in combination with energy-dispersive x-ray microanalysis show that annealing below this temperature leads to the juxtaposed Al and Si layers exchanging places. The newly formed poly-Si layer is fully crystallized and of good crystalline quality, according to Raman spectroscopy and transmission electron microscopy investigations. At 500 °C, the time needed to crystallize a 500-nm-thick Si layer is as short as 30 min. By annealing above the eutectic temperatures, layer exchange is not as pronounced and the newly formed Al layer is found to contain a network of crystallized Si.

Modeling and optimization of thin-film devices with Si/sub 1-x/Ge/sub x/ alloys

Alloys that have a lower bandgap than silicon can extend the infrared response of a silicon cell and hence increase the current generation. One group of materials that are compatible with silicon is Si/sub 1-x/Ge/sub x/ alloys as silicon is completely miscible with germanium. One problem associated with this method is that, because the introduced material has a lower bandgap, it will therefore also cause the device to suffer a loss in voltage. Most research to date has focused on single-junction bulk devices and shows that the loss in voltage overrides the increase in current except for very low germanium content alloys. This work looks at incorporating these Si/sub 1-x/Ge/sub x/ alloys into a thin-film multilayer structure where the flexibility offered through controlling the number and location of junctions facilitates the achievement of high collection probabilities even in thin regions of high germanium concentration where the diffusion lengths are extremely short. PC1D (a one-dimensional circuit simulation package) has been used to simulate the effect of incorporating a layer of Si/sub 1-x/Ge/sub x/ alloy into the multilayer structure. Results show that considerable efficiency enhancement is achieved with this structure, especially for high germanium concentration alloys. The whole range of germanium concentrations is explored.

Limits to the efficiency of silicon multilayer thin film solar cells

Abstract Thin film crystalline silicon solar cells can only achieve high efficiencies if light trapping can be used to give a long optical path length, while simultaneously achieving near unity collection probabilities for all generated carriers. This necessitates a supporting substrate of a foreign material, with refractive index compatible with light trapping schemes for the silicon. The resulting inability to nucleate growth of crystalline silicon films of good crystallographic quality on such foreign substrates, at present, prevents the achievement of high efficiency devices using conventional single junction solar cell structures. The parallel multijunction solar cell provides a new approach for achieving high efficiencies from very poor quality material, with near unity collection probabilities for all generated carriers achieved through appropriate junction spacing. Heavy doping is used to minimise the dark saturation current contribution from the layers, therefore allowing respectable voltages. The design strategy, corresponding advantages, theoretical predictions and experimental results are presented.

Simplified buried contact solar cell process

The buried contact solar cell (BCSC) was originally developed as a high performance technology capable of taking full advantage of the high voltages and efficiencies able to be achieved with floatzone substrates. In this process, three lengthy high temperature processes are necessary. In recent months, a simplified process has been developed that eliminates these three lengthy high temperature processes associated with groove diffusion, back surface field formation and the growth of a thick thermal oxide on the surface. Although considerable performance loss is sustained when applied to floatzone substrates, the simplified process appears capable of achieving similar efficiencies to the conventional BCSC process when applied to solar grade Czochralski and multicrystalline substrates. Just as importantly, the simplified BCSC process has been developed for implementation onto existing screen printing production lines using virtually all the same equipment except for the addition of the grooving process which is applied to the virgin wafer prior to any other processing. This process appears to be particularly well suited to existing manufacturers of screen printed solar cells, where the higher performance and lower cost of the BCSC can be achieved without the need for the decommissioning of existing equipment or large scale investment in new infrastructure and equipment.

Improved open circuit voltage using metal mediated epitaxial growth in thyristor structure solar cells

Most presently manufactured bulk photovoltaic devices suffer from poor rear surface recombination velocities which limit the achievable efficiencies. In order to overcome this efficiency limitation, an innovative approach to redesigning the rear contact has been sought. The Buried Contact Solar Cell (BCSC) has been chosen as the basis for this study as this technology has been proven to be superior in performance to other commercially available bulk technologies. The new rear contacting scheme has been devised with improved experimental devices demonstrated. It utilises a process known as Metal Mediated Epitaxial Growth (MMEG) to achieve an improved Back Surface Field (BSF). This device design can also take advantage of the thyristor structure by utilising the p + region formed by MMEG in conjunction with the n-p-n structure unavoidably produced during most manufacturing processes. Results indicate that superior rear surface passivation can be achieved using this process and design. Higher open circuit voltages in the vicinity of 30-40 m V have been achieved relative to the conventional BCSC, indicating that higher efficiency devices are possible.

High efficiency at module level with almost no cell metallisation: Multiple wire interconnection of reduced metal solar cells

Perpendicular multiple busbar wires have proven an effective way of interconnecting standard screen printed solar cells with high reliability and low cell to module loss. The technology is also an effective way to interconnect plated solar cells, where conventional soldered interconnects may be problematic. However, the full benefits of this interconnection technology can be fully realized on plated cell structures with drastically reduced plated metallization. This paper presents a new selective emitter plated cell structure with metallization reduced to around 1 μm thickness, interconnected using perpendicular multiple busbar wires. Metal usage on the cell is reduced by more than 90% compared to conventional plated or screen print cells and the use of Ag almost eliminated, while high efficiency at the module level is achieved along with environmental durability.

Thyristor photovoltaic devices formed by epitaxial growth

Typical commercial photovoltaic (PV) devices suffer from high rear surface recombination velocities that degrade performance and prevent economical gains through the use of thinner substrates. The triple-junction thyristor appears to provide an alternative structure that is simple to form and with the potential for improved performance through capitalizing on the excellent surface passivation achievable through the use of thermally oxidized n-type surfaces. When using phosphorus diffused p-type wafers, the additional rear p-type layer can be easily formed at low temperature by metal mediated epitaxial growth. These layers are studied and characterized to ascertain their suitability. Design considerations and strategies for the implementation of such layers into the thyristor structure for PV generation are presented and discussed. Thyristor PV devices have the additional advantage of blocking current in the dark, alleviating the need for blocking diodes.

A new approach for forming device contacts with improved surface passivation [solar cells]

Increased interest in renewable energy sources and concern for the environment are giving impetus to the search for viable energy alternatives. One step to increasing the economic viability of PV technology is to improve the energy conversion efficiency. Most commercially produced solar cells suffer from poor rear surface passivation, including the buried contact solar cell (BCSC), with a poor back surface field (BSF) produced by an aluminium alloying process. In this work, the low temperature process of metal mediated epitaxial growth (MMEG) is used to produce an improved back surface field (BSF) and surface passivation for the BCSC in conjunction with reduced area contacts. The material produced by MMEG gives a p/sup +/ epitaxial silicon layer doped with Al at approximately 2/spl times/10/sup 18/ atoms-cm/sup -3/. Experimental devices achieve an improvement of 30-40 mV in open circuit voltage over the standard BCSC indicating a significant improvement in rear surface passivation.

Capitalizing on two dimensional minority carrier injection in silicon solar cell design

Abstract Injection effects can be effectively utilised in multijunction solar cells to provide new device design rules and higher efficiency cells. A solar cell with multiple pn-junctions can take advantage of injection effects to de-couple the thickness of each individual layer from the lateral series resistance. This allows improved collection efficiency in the presence of high surface recombination, reduced series resistance, reduced metal shadowing losses and increased tolerance to discontinuities in the top layers.