Liu Honggang

Physical modeling based on hydrodynamic simulation for the design of InGaAs/InP double heterojunction bipolar transistors ∗

A physical model for scaling and optimizing InGaAs/InP double heterojunction bipolar transistors (DHBTs) based on hydrodynamic simulation is developed. The model is based on the hydrodynamic equation, which can accurately describe non-equilibrium conditions such as quasi-ballistic transport in the thin base and the velocity overshoot effect in the depleted collector. In addition, the model accounts for several physical effects such as bandgap narrowing, variable effective mass, and doping-dependent mobility at high fields. Good agreement between the measured and simulated values of cutoff frequency, ft, and maximum oscillation frequency, fmax, are achieved for lateral and vertical device scalings. It is shown that the model in this paper is appropriate for downscaling and designing InGaAs/InP DHBTs.

The Impact of HCl Precleaning and Sulfur Passivation on the Al2O3/Ge Interface in Ge Metal-Oxide-Semiconductor Capacitors

Surface treatment for Ge substrates using hydrogen chlorine cleaning and chemical passivation are investigated on AuTi/Al2O3/Ge metal-oxide-semiconductor capacitors. After hydrogen chlorine cleaning, a smooth Ge surface almost free from native oxide is demonstrated by atomic force microscopy and x-ray photoelectron spectroscopy observations. Passivation using a hydrogen chlorine solution is found to form a chlorine-terminated surface, while aqueous ammonium sulfide pretreatment results in a surface terminated by Ge-S bonding. Compared with chlorine-passivated samples, the sulfur-passivated ones show less frequency dispersion and better thermal stability based on capacitance-voltage characterizations. The samples with HCl pre-cleaning and (NH4)2S passivation show less frequency dispersion than the HF pre-cleaning and (NH4)2S passivated ones. The surface treatment process using hydrogen chlorine cleaning followed by aqueous ammonium sulfide passivation demonstrates a promising way to improve gate dielectric/Ge interface quality.

Effect of the Si-doped In0.49Ga0.51P barrier layer on the device performance of In0.4Ga0.6As MOSFETs grown on semi-insulating GaAs substrates

In0.4Ga0.6As channel metal?oxide?semiconductor field-effect transistors (MOSFETs) with and without an Si-doped In0.49Ga0.51P barrier layer grown on semi-insulating GaAs substrates have been investigated for the first time. Compared with the In0.4Ga0.6As MOSFETs without an In0.49Ga0.51P barrier layer, In0.4Ga0.6As MOSFETs with an In0.49Ga0.51P barrier layer show higher drive current, higher transconductance, lower gate leakage current, lower subthreshold swing, and higher effective channel mobility. These In0.4Ga0.6As MOSFETs (gate length 2 ?m) with an In0.49Ga0.51P barrier layer exhibit a high drive current of 117 mA/mm, a high transconductance of 71.9 mS/mm, and a maximum effective channel mobility of 1266 cm2/(V?s).

GaSb p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Ni/Pt/Au Source/Drain Ohmic Contacts

GaSb is an attractive candidate for future high-performance III–V p-channel metal-oxide-semiconductor-field-effect-transistors (pMOSFETs) because of its high hole mobility. The effect of HCl based-chemical cleaning on removing the non-self limiting and instable native oxide layer of GaSb to obtain a clean and smooth surface has been studied. It is observed that the rms roughness of a GaSb surface is significantly reduced from 2.731 nm to 0.693 nm by using HCl:H2O (1:3) solution. The Ni/Pt/Au ohmic contact exhibits an optimal specific contact resistivity of about 6.89 × 10−7 Ω·cm2 with a 60s rapid thermal anneal (RTA) at 250°C. Based on the chemical cleaning and ohmic contact experimental results, inversion-channel enhancement GaSb pMOSFETs are demonstrated. For a 6 μm gate length GaSb pMOSFET, a maximum drain current of about 4.0 mA/mm, a drain current on-off (ION/IOFF) ratio of > 103, and a subthreshold swing of ~250 mV/decade are achieved. Combined with the split C–V method, a peak hole mobility of about 160 cm2/V·s is obtained for a 24 μm gate length GaSb pMOSFET.

MIM capacitors with various Al2O3 thicknesses for GaAs RFIC application

The impact of various thicknesses of Al2O3 metal—insulator—metal (MIM) capacitors on direct current and radio frequency (RF) characteristics is investigated. For 20 nm Al2O3, the fabricated capacitor exhibits a high capacitance density of 3850 pF/mm2 and acceptable voltage coefficients of capacitance of 681 ppm/V2 at 1 MHz. An outstanding VCC-α of 74 ppm/V2 at 1 MHz, resonance frequency of 8.2 GHz and Q factor of 41 at 2 GHz are obtained by 100 nm Al2O3 MIM capacitors. High-performance MIM capacitors using GaAs process and atomic layer deposition Al2O3 could be very promising candidates for GaAs RFIC applications.

Effect of ultrathin GeOx interfacial layer formed by thermal oxidation on Al2O3 capped Ge

We propose a modified thermal oxidation method in which an Al2O3 capping layer is used as an oxygen blocking layer (OBL) to form an ultrathin GeOx interfacial layer, and obtain a superior Al2O3/GeOx/Ge gate stack. The GeOx interfacial layer is formed in oxidation reaction by oxygen passing through the Al2O3 OBL, in which the Al2O3 layer could restrain the oxygen diffusion and suppress the GeO desorption during thermal treatment. The thickness of the GeOx interfacial layer would dramatically decrease as the thickness of Al2O3 OBL increases, which is beneficial to achieving an ultrathin GeOx interfacial layer to satisfy the demand for small equivalent oxide thickness (EOT). In addition, the thickness of the GeOx interfacial layer has little influence on the passivation effect of the Al2O3/Ge interface. Ge (100) p-channel metal–oxide–semiconductor field-effect transistors (pMOSFETs) using the Al2O3/GeOx/Ge gate stacks exhibit excellent electrical characteristics; that is, a drain current on-off (Ion/Ioff) ratio of above 1×104, a subthreshold slope of ~ 120 mV/dec, and a peak hole mobility of 265 cm2/Vs are achieved.

The Microwave Characteristics of an In0.4Ga0.6As Metal-Oxide-Semiconductor Field-Effect Transistor with an In0.49Ga0.51P Interfacial Layer

A high microwave performance enhancement-mode (E-mode) In0.4Ga0.6As channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a Si-doped In0.49gGa0.51P interfacial layer is fabricated. A 0.8-μm-gate-length In0.4Ga0.6As MOSFET with a 5-nm Al2O3 dielectric layer provides a current gain cutoff frequency of 16.7 GHz and a maximum oscillation frequency of 52 GHz. A semi-empirical small-signal-parameter extraction technique accounting for the low frequency anomaly of this MOSFET device is described, which is based on on-wafer S-parameter measurements. Excellent agreement between measured and simulated scattering parameters as well as the physically realistic circuit elements demonstrates the validity of this approach.

Fabrication of a novel RF switch device with high performance using In0.4Ga0.6As MOSFET technology

A novel radio frequency (RF) switch device has been successfully fabricated using InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) technology. The device showed drain saturation currents of 250 mA/mm, a maximum transconductance of 370 mS/mm, a turn-on resistance of 0.72 mΩ · mm 2 and a drain current on-off (I on /I off ) ratio of 1 × 10 6 . The maximum handling power of on-state of 533 mW/mm and off-state of 3667 mW/mm is obtained. The proposed In 0.4 Ga 0.6 As MOSFET RF switch showed an insertion loss of less than 1.8 dB and an isolation of better than 20 dB in the frequency range from 0.1 to 7.5 GHz. The lowest insertion loss and the highest isolation can reach 0.27 dB and more than 68 dB respectively. This study demonstrates that the InGaAs MOSFET technology has a great potential for RF switch application.

Solid Phase Reactions of Ni-GaAs Alloys for High Mobility III-V MOSFET Applications

The solid phase reactions of Ni with GaAs substrates are investigated. The experimental results reveal that the Ni-GaAs solid phase reaction forms a ternary phase of Ni2GaAs when annealing temperatures are in the range 250?300?C. As the annealing temperature increases to 400?C, the Ni2GaAs phase starts to decompose due to NiAs phase precipitation. Ni-GaAs alloys processed at 400?C with a 3 min annealing time demonstrate a sheet resistance of 30?/square after unreacted Ni removal in hot diluted-HCl solutions. Therefore, Ni-GaAs alloys formed by solid phase reaction could be promising metallic source/drain structures with significant low series resistance for high mobility III?V metal-oxide-semiconductor field effect transistor (MOSFET) applications.

Extrinsic Base Surface Passivation in High Speed “Type-II" GaAsSb/InP DHBTs Using an InGaAsP Ledge Structure

Type-II GaAsSb/InP DHBTs with selectively-etched InGaAsP ledge structures are fabricated and characterized for the first time. The novel InGaAsP/GaAsSb/InP DHBTs with a 20 nm lattice-matched GaAsSb base and a 75 nm InP collector have a dc current gain improvement by a factor of 2 and a cutoff frequency fT of 190 GHz. The InGaAsP ledge design provides a simple but effective approach to suppress the extrinsic base surface recombination and enable GaAsSb/InP DHBTs to further increase the operating frequencies and integration levels for millimeter wave applications.