Lothar Pfitzner

From overall equipment efficiency (OEE) to overall Fab effectiveness (OFE)

Abstract The metrics of the SEMI standard E79 offers a good method to calculate the overall equipment efficiency (OEE) and finds increasing application and acceptance in the semiconductor industry. To effectively apply E79, communication with the host using the SEMI SECS and GEM standards is required. Beyond the application of the communication standards, equipment models for the different tools and especially for cluster tools have to be created. Up to now, there are no standardized OEE models available. The paper will give examples of modeling methods, models, and also of software tools for the calculation and monitoring of OEE. However, successful analysis on OEE only is not sufficient as no machine is isolated in a factory, but operates in a linked and complex environment. A wider approach has to focus also on the performance of the whole factory. The characterization of a semiconductor factory by qualified metrics is rather complicated and difficult. So far, no standardized methods and metrics are available. Different methods and metrics introduced in the literature are presented in the paper. All methods have in common that they do not directly consider the costs. Including cost analysis would require the use of metrics for characterization of overall Fab effectiveness (OFE) in order to obtain a result for the cost per die out.

Reducing airborne molecular contamination by efficient purging of FOUPs for 300-mm wafers-the influence of materials properties

The control of airborne molecular contamination (AMC) plays an increasing role in semiconductor manufacturing processes. A method to reduce AMC is purging of wafer boxes with inert gas. In this study, data on the practicability and optimization of purging a front opening unified pod (FOUP), a wafer box for 300-mm wafers, are presented. Different parameters for the purge process are evaluated experimentally. Key values for the assessment of efficiency are the time-dependent content of oxygen and humidity in the FOUP. The increase in the key values after the purge was measured and the construction of the FOUP was modified in order to obtain sufficient tightness. Spatially resolved measurements reveal the homogeneity of the purge. Experimental data are compared to data obtained by a simulation using a computational fluid dynamics program. Values for oxygen are in agreement with the calculated curves. In contrast to this, an additional, long-lasting contribution that was not taken into account in the simulations makes depletion of humidity slower than expected. This contribution is explained with the desorption and permeation of humidity through the plastic walls of the FOUP. The presence of both effects, desorption and permeation, is proved and quantified. Materials properties turn out to heavily affect purge effectiveness and the postpurge ingress of certain contaminants in a wafer box.

Cost reduction strategies for wafer expenditure

Abstract The productivity enhancement in microelectronics requires — among other measures — an increase in wafer diameter, such as the current transition from 200 to 300 mm. This transition of wafer diameter implicates an increase of fab costs, especially equipment costs, as well as an increase of costs for silicon material. Two approaches are suited to reduce the total wafer costs: the integration of metrology into processing tools and the abundant use of reclaim wafers. With both methods, a wafer cost reduction can be achieved by reducing the amount of monitor and test wafers and by re-usage of misprocessed product wafers. The examples for Integrated Metrology given in the paper are ellipsometer integration into a cluster tool, integrated scatterometry for fast fault detection, and in situ particle measurement. The possible savings in test and monitor wafers, which can be achieved by integration of metrology, strongly depend on process technology, process flow, the process itself, and equipment. For mass products like memories, the amount of monitor and test wafers could be reduced by half and for ASICS even more. This means a total reduction in wafer expenditure of 7–15% for ASIC production, and even 15–25% may be reached for mass production. Savings in this order require a fab-wide integration of metrology. A prerequisite is the development of standardized approaches for the integration of metrology comprehending standardized hardware and software interfaces. Integrated metrology can reduce the amount of material transport and wafer handling and also improve the equipment utilization and maintenance. The control paradigm can thus be shifted from a lot-to-lot basis to a wafer-to-wafer basis for the 300 mm technology. For wafer reclaim it could be shown that the reclaiming of non-productive wafers allows an increase in the profitability of an advanced wafer fab. In contrast to conventional wafer reclaim, different quality levels optimized for the accordingly different applications in a wafer fab were defined. Quality control of reclaimed wafers is of utmost importance within each specified level. The efficiency of the reclaim service can be significantly increased by an application-specific wafer reclaim model consisting of different quality levels. However, optimized strategies further require closer linking of IC production and wafer reclaim with optimized logistics.

In situ spectroscopic ellipsometry for advanced process control in vertical furnaces

Abstract For the first time, a spectroscopic ellipsometer (SE) has been integrated as an in situ layer thickness sensor into a vertical batch furnace for industrial LPCVD layer deposition. A SOPRA MOSS-OMA SE was selected because of its high accuracy and versatility. In the vertical furnace, the SE can be used for in situ sensing of the layer growth as well as for post-process control of the batch. The adaptation of the SE to the furnace was performed with only minor modifications to the furnace geometry. The light beam of the SE is guided through the base plate into the furnace tube and directed onto the wafer by quartz glass prisms operating in total internal reflection mode. This arrangement introduces a well-defined additional phase shift in the polarization state of the light, which can be calculated and subtracted from the measured phase shift. The system was used in the first step to determine the optical reference data for crystalline silicon, silicon oxide and silicon nitride as a function of temperature. These data were implemented in the refractive index library of the in situ SE for endpoint monitoring and control of layer composition in the second step. The arrangement of the in situ SE also enables post-process measurements on selected wafers of the batch during the unloading sequence. In situ as well as post-process data were used by the furnace for immediate and automated correction of parameter settings. Rapid process optimization and real-time control of integrated multilayer processing have been demonstrated to be the major benefits of the novel real-time SE technique.

Complementary Metrology within a European Joint Laboratory

The continuous dimensional reduction drives the development of metrology, analysis and characterization for nano and micro electronics. An enormous worldwide R&D effort focuses on the understanding and controlling materials properties and dimensions at atomic level. Crucial for groundbreaking new developments is the availability of appropriate analytical infrastructures providing techniques with information depths well adapted to the nanoscaled objects of interest. This requires widely accessible, independent complementary metrology, analytical techniques, and characterization. For example new materials and the demand of improved detection sensitivities for contaminants provide huge challenges for the capabilities of current analysis equipment and expertise. At the same time, the availability of complementary competences is crucial for advancement of analytical methodologies through cross-comparison, round-robin, and benchmarking of results. This paper describes the formation of an independent analytical infrastructure within Europe having the expertise and competence to solve metrology problems for development of nanotechnologies. Furthermore, a strategy is shown to establish independently operating ‘Golden Laboratories’ for complementary and reliable metrology, analysis, and characterization adapted to the requirements of industrial partners.

Phi-scatterometry for integrated linewidth and process control in DRAM manufacturing

A cost-effective scatterometry method is presented that is suited for integrated pattern and process control and is valuable as a supplement to conventional scanning electron microscopes. The phi-scatterometry procedure is carried out directly on periodic functional patterns instead of using additional test structures. Time-consuming simulations of diffraction effects are not required. The measurement results are evaluated by neural networks performing classifications of pattern and process parameters. Thereby, fast fault detection and immediate process control are achieved. The measurements were performed on a 300-mm wafer with systematically varied focus and exposure as well as on production lots, both with DRAM patterns featuring trenches in two dimensions. A phi-scatterometry prototype was built which is suited for flexible mobile metrology in 300-mm production environments.

Integrated metrology: an enabler for advanced process control (APC)

Advanced process control (APC) techniques become more and more important as short innovation cycles in microelectronics and a highly competitive market requires cost-effective solutions in semiconductor manufacturing. APC marks a paradigm shift from statistically based techniques (SPC) using monitor wafers for sampling measurement data towards product wafer control. The APC functionalities including run-to-run control, fault detection, and fault analysis allow to detect process drifts and excursions at an early stage and to minimize the number of misprocessed wafers. APC is being established as part of factory control systems through the definition of an APC framework. A precondition for APC is the availability of sensors and measurement methods providing the necessary wafer data. This paper discusses integrated metrology as an enabler for APC and demonstrates practical implementations in semiconductor manufacturing.

Novel process control strategies for 300 mm semiconductor production

Semiconductor industry is one of the fastest growing businesses. Integrated circuit production process is becoming more and more challenging as the increase in complexity and in wafer size continues. Semiconductor manufacturing comprises hundreds of mostly complex processing steps, almost each of them has to be controlled within a narrow process window. Measurement steps are more or less frequently used in the production processing. Quite often it is required to take those wafers that have to be tested or measured out of the production lots, which affects logistics and, even worse, adds costs for such monitor wafers. It is of utmost importance to check new strategies in monitoring for the enhancement of yield at any possible level. Three practical examples for integrated metrology, X-ray-induced photoelectron spectroscopy and ellipsometry integrated into a cluster tool and ellipsometry integrated into a vertical furnace have been demonstrated and will be described. Considerations of cost savings by integrated metrology are made concerning increase in equipment availability, yield improvement and reduction in cleanroom space.

In situ layer characterization by spectroscopic ellipsometry at high temperatures

The demand for increased cost-effectiveness in semiconductor manufacturing is the driving force for the development of in situ and in-line measurement tools. Some of the most critical manufacturing steps are high-temperature processes such as thermal oxidation and chemical layer deposition. Solutions for accessing batch furnace processes by high-temperature single wavelength and spectroscopic ellipsometry for layer thickness and composition control have been proposed and studied intensively in the past. These techniques require comprehensive knowledge of the optical parameters at high temperatures. Therefore, a systematical study has been started to determine the optical high-temperature data (refractive index, extinction coefficient) of relevant semiconductor materials. Moreover, optical data of amorphous and polycrystalline silicon at high temperature are under investigation. All measurements were performed with a spectroscopic ellipsometer integrated in a vertical LPCVD-batch furnace. Optical access is...

Modular metrology tools for productivity enhancement in wafer fabs

Integrated metrology helps to reduce costs by decreasing the number of monitor wafers and by reducing the risk of wafer loss. For these reasons, there is an increasing demand for solutions which help to interface process control tools to manufacturing equipment in a cost-effective way. In this paper different measurement strategies are compared. A modular design of metrology tools is proposed enabling equipment vendors and sensor manufacturers to fast and easily integrate various metrology tools.