Louise H. Crockett

UHF white space network for rural smart grid communications

We present a white space communications test bed running in the Scottish Highlands and Islands, and discuss its feasibility for smart grid communications. The network aims to serve communities that have great potential for distributed generation of electricity, by means of wind, water, and tidal power. However, smart grid applications such as remote meter reading and load balancing are impaired by the scarcety or lack of communications infrastructure in remote rural areas such as the Scottish Highlands and Islands. We argue that the proposed system is based on a network of energy self-sufficient radio relay nodes that make it a robust and independent medium to support smart grid communications in rural settings.

Dynamic Reconfiguration Technologies Based on FPGA in Software Defined Radio System

Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected. Using this strategy, the physical layer processing architecture in Software Defined Radio (SDR) systems can benefit from reduced complexity and increased design flexibility, as different waveform applications can be grouped into one part of a single FPGA. Waveform switching often means not only changing functionality, but also changing the FPGA clock frequency. However, that is beyond the current functionality of PR processes as the clock components (such as Digital Clock Managers (DCMs)) are excluded from the process of partial reconfiguration. In this paper, we present a novel architecture that combines another reconfigurable technology, Dynamic Reconfigurable Port (DRP), with PR based on a single FPGA in order to dynamically change both functionality and also the clock frequency. The architecture is demonstrated to reduce hardware utilization significantly compared with standard, static FPGA design.

A low-cost desktop software defined radio design environment using MATLAB, simulink, and the RTL-SDR

In the last five years, the availability of powerful DSP and communications design software, and the emergence of relatively affordable devices that receive and digitize RF signals, has brought SDR to the desktops of many communications engineers. However, the more recent availability of very low cost SDR devices such as the RTL-SDR, costing less than

Partially reconfigurable TVWS transceiver for use in UK and US markets

20, has brought SDR to the home desktops of undergraduate and graduate students, as well as professional engineers and the maker communities. Since the release of the various open source drivers for the RTL-SDR, many in the digital communications community have used this device to scan the RF spectrum and digitize I/Q signals that are being transmitted in the range 25 MHz to 1.75 GHz. This wide operating range enables the sampling of frequency bands containing signals such as FM radio, ISM signals, GSM, 3G and LTE mobile radio, GPS, and so on. In this article we will describe the opportunity and operation of the RTL-SDR, and the development of a handson, open-courseware for SDR. These educational materials can be integrated into core curriculum undergraduate and graduate courses, and will greatly enhance the teaching of DSP and communications theory, principles, and applications. The lab and teaching materials have recently been used in senior (fourth year undergraduate) courses and are available as open course materials for all to access, use, and evolve.

Pulse Shaping for RF Communications in Wireless Sensor Networks

With more and more countries opening up sections of unlicensed spectrum for use by TV White Space (TVWS) devices, the prospect of building a device capable of operating in more than one world region is appealing. The difficulty is that the locations of TVWS bands within the radio spectrum are not globally harmonised. With this problem in mind, the purpose of this paper is to present a TVWS transceiver design which is capable of being reconfigured to operate in both the UK and US spectrum. We present three different configurations: one covering the UK TVWS spectrum and the remaining two covering the various locations of the US TVWS bands.

Symbol Synchronisation Implementation for Low-Power RF Communication in Wireless Sensor Networks

This paper evaluates the introduction of pulse shaping to RF communications between nodes in an ultra-small, wireless sensor network technology. With low power consumption crucial, and in the context of a digital transceiver which utilizes Manchester encoding to reduce the synchronization overhead, we consider the addition of pulse shaping filters to an existing on-off keyed transmission scheme. Pulse shaping is shown to reduce spectral leakage and thereby to allow the transmit power to be reduced. These evaluations are made in the context of 125 mm 3 nodes transmitting over channels of up to 30 cm, with potentially poor clock oscillators and limited energy storage capacity

FPGA implementation of a cyclostationary detector for OFDM signals

Speckled computing is a novel vision of a wireless sensor network consisting of small nodes which can sense, compute and network wirelessly. The nodes individually have limited power and processing resources, but together forms a powerful processing system. Electrical power resources at such a volume are severely restricted, and as such design decisions are made with low-power as the first priority. This work examines the use of Manchester encoding in the digital transceiver to reduce the complexity of symbol synchronisation. A Manchester decoder has been implemented which has the useful property of being tolerant to oscillator inaccuracies, allowing a cheap and low-power clock source to be employed. A realistic implementation of the decoder using rectangular pulse-shaping and an oversampling ratio of 8 allows an on-chip oscillator tolerance of more than 11%

FPGA implementation of a memory-efficient Hough Parameter Space for the detection of lines

Due to the ubiquity of Orthogonal Frequency Division Multiplexing (OFDM) based communications standards such as IEEE 802.11 a/g/n and 3GPP Long Term Evolution (LTE), a growing interest has developed in techniques for reliably detecting the presence of these signals in dynamic radio systems. A popular approach for detection is to exploit the cyclostationary nature of OFDM communications signals. In this paper, we focus on a frequency domain cyclostationary detection algorithm first introduced by Giannakis and Dandawate and study its performance in detecting IEEE 802.11a OFDM signals in the presence of practical radio impairments such as Carrier Frequency offset (CFO), Phase Noise, I/Q Imbalance, Multipath Fading and DC offset. We then present a hardware implementation of this algorithm developed using MathWorks HDL Coder and provide implementation results after targeting to a Xilinx 7 Series FPGA device.

A Low Complexity Cyclostationary Detector for OFDM Signals

The Line Hough Transform (LHT) is a robust and accurate line detection algorithm, useful for applications such as lane detection in Advanced Driver Assistance Systems. For real-time implementation, the LHT is demanding in terms of computation and memory, and hence Field Programmable Gate Arrays (FPGAs) are often deployed. However, many small FPGAs are incapable of implementing the LHT due to the large memory requirement of the Hough Parameter Space (HPS). This paper presents a memory-efficient architecture of the LHT named the Angular Regions — Line Hough Transform (AR-LHT). We present a suitable FPGA implementation of the AR-LHT and provide a performance and resource analysis after targeting a Xilinx xc7z010-1 device. Results demonstrate that, for an image of 1024×1024 pixels, approximately 48% less memory is used than the Standard LHT. The FPGA architecture is capable of processing a single image in 9.03ms.

High-level synthesis for medical image processing on Systems on Chip: A case study

One of the key challenges for state of the art radio systems is enabling efficient utilisation of the Radio Frequency (RF) spectrum. Licensed frequency bands are often under-utilised in both time and geographical location and thus the opportunity exists for secondary users to transmit in these bands, provided that they do not interfere significantly with the operation of the primary licensed user. A proposed method for exploiting this opportunity is Cognitive Radio (CR) wherein the secondary user is able to modify its transmissions based on observation of the operating RF environment. Orthogonal Frequency Division Multiplexing (OFDM) is the enabling technology for many modern communications standards such as IEEE 802.11a (WiFi) and 4G Long Term Evolution (LTE). Therefore, facilitating robust and cost effective detection of OFDM signals is a key problem for the design of secondary user CR systems. In this paper, we derive and assess the performance of a low complexity detection scheme that exploits the inherent cyclostationarity of OFDM signals. We then present details of its implementation on a Xilinx Artix 7 FPGA and compare the resource cost of the proposed detector with another low complexity detection algorithm found in the literature.