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Dive into the research topics where Luc Claesen is active.

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Featured researches published by Luc Claesen.


IEEE Journal of Solid-state Circuits | 1986

Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system

R. Jain; Francky Catthoor; J. Vanhoof; B.J.S. De Loore; G. Goossens; N.F. Goncalvez; Luc Claesen; J. Van Ginderdeuren; Joos Vandewalle; H.J. De Man

The computer-aided design of a VLSI PCM-FDM transmultiplexer is presented. The entire design process, from system specifications to integrated circuit layout, is carried out with the aid of specialized computer programs for the analysis, synthesis, and optimization at each design level: the filter network, the architecture, and the circuit layout. These CAD tools support a top-down custom design methodology based on bit-serial architectures and standard cells. A customized architecture is constructed which is integrated using a 5-/spl mu/m CMOS cell library. The results are compared with a fully manual design and demonstrate the power of architecture based computer-aided design methodologies for VLSI filtering. By combining both synthesis and optimization aids at each design level it is possible to achieve a high degree of automation while retaining an efficient use of silicon area, high throughput, and moderate power consumption.


ieee international workshop on horizontal interactive human computer systems | 2008

IntuPaint: Bridging the gap between physical and digital painting

Peter Vandoren; T. Van Laerhoven; Luc Claesen; Johannes Taelman; Chris Raymaekers; F. Van Reeth

This paper presents a novel interface for a digital paint system: IntuPaint. A tangible interface for a digital paint easel, using an interactive surface and electronic brushes with a tuft of bristles, has been developed. The flexible brush bristles conduct light by means of total internal reflection inside the individual bristles. This enables to capture subtle paint nuances of the artist in a way that was not possible in previous technologies. This approach provides natural interaction and enables detailed tracking of specific brush strokes. Additional tangible and finger-based input techniques allow for specific paint operations or effects. IntuPaint also offers an extensive model-based paint simulation, rendering realistic paint results. The reality-based approach in the combination of user interface and paint software is a new step forward to bridge the gap between physical and digital painting, as is demonstrated by initial user tests.


interactive tabletops and surfaces | 2009

FluidPaint: an interactive digital painting system using real wet brushes

Peter Vandoren; Luc Claesen; Tom Van Laerhoven; Johannes Taelman; Chris Raymaekers; Eddy Flerackers; Frank Van Reeth

This paper presents FluidPaint, a novel digital paint system using real wet brushes. A new interactive canvas, accurately registering brush footprints and paint strokes in high precision has been developed. It is based on the real-time imaging of brushes and other painting instruments as well as the real-time co-located rendering of the painting results. This new painting user interface enhances the user experience and the artists expressiveness. User tests demonstrate the intuitive nature of FluidPaint, naturally integrating interface elements of traditional painting in a digital paint system.


international conference on computer design | 1996

A formal verification technique for embedded software

Olivier Thiry; Luc Claesen

A method for the verification of embedded software correctness is presented. A formal model for an actual commercial microprocessor is established. This is done by modeling the instruction set and processor architecture. Embedded software takes the form of the assembly program code to be run on the processor. Specifications are given as CTL temporal logic formulae. The method has been implemented in the SMV model checker and is illustrated by a practical embedded system application: a mouse controller. The inconsistency of the specification and the implementation as an assembly language program as it has been published in the applications book of the manufacturer has been uncovered.


asian conference on pattern recognition | 2011

Binary confidence evaluation for a stereo vision based depth field processor SoC

Andy Motten; Luc Claesen; Yun Pan

This paper presents a methodology to construct a binary confidence value for every pixel of a depth map. We start by constructing 72 different confidence metrics, including the traditional ones and new metrics based on neighborhood information. Construction of the binary confidence value from these metrics is hence viewed as a two-class classification problem where we evaluated three different classifiers, with increasing complexity. Only metrics and classifiers that are suitable for VLSI hardware implementation will be evaluated. Evaluation of the constructed classifiers is performed on an indoor dataset of Stereo Images.


international conference on model transformation | 2011

Low-cost real-time stereo vision hardware with binary confidence metric and disparity refinement

Andy Motten; Luc Claesen

This paper presents a real-time stereo vision System-on-Chip (SoC) architecture for a depth-field generation processor as required in 3D TV applications. This architecture includes post-processing steps like a decision tree based confidence metric and a disparity refinement module while still fitting in a low cost FPGA. A real-time stereo matching calculation at a frame rate of 56 Hz with a resolution of 800x600 and a disparity of 80 has been realized using this architecture without the need for external memories.


system on chip conference | 2010

A binary adaptable window SoC architecture for a stereo vision based depth field processor

Andy Motten; Luc Claesen

This paper presents a novel binary fully adaptable window for incorporating in a stereo matching System-on-Chip (SoC) architecture. This architecture is fully scalable and parameterizable to allow for custom SoC implementations, as well as rapid prototyping on FPGAs. For each window a binary mask window is generated which selects the supporting pixels in the cost aggregation phase of the SAD algorithm. This selection is performed using color similarity and spatial distance metrics. Hardware resource utilization for a fixed window and an adaptable window cost aggregation is compared based on FPGA logic element use.


human factors in computing systems | 2008

Dip - it: digital infrared painting on an interactive table

Peter Vandoren; Tom Van Laerhoven; Luc Claesen; Johannes Taelman; Fabian Di Fiore; Frank Van Reeth; Eddy Flerackers

In this paper we report on our work to develop a novel input technique for a digital paint system. Using a brush with infrared (IR) light emitting fibers, we were able to create a natural paint interface on an interactive table. This IR-brush adds two important properties to our paint environment: haptic feedback and an accurate brush footprint. The modified brush approaches the haptic feedback of the traditional paint brush. The use of IR-light in the brush enables tracking the contact area of the brush on the interactive table. Informal usability tests show that our digital paint environment offers an intuitive interface and contributes to an enhanced user experience in digital painting.


multimedia and ubiquitous engineering | 2013

A Fast Self-Organizing Map Algorithm for Handwritten Digit Recognition

Yimu Wang; Alexander Peyls; Yun Pan; Luc Claesen; Xiaolang Yan

This paper presents a fast version of the self-organizing map (SOM) algorithm, which simplifies the weight distance calculation, the learning rate function and the neighborhood function by removing complex computations. Simplification accelerates the training process in software simulation and is applied in the field of handwritten digit recognition. According to the evaluation results of the software prototype, a 15–20 % speed-up in the runtime is obtained compared with the conventional SOM. Furthermore, the fast SOM accelerator can recognize over 81 % of handwritten digit test samples correctly, which is slightly worse than the conventional SOM, but much better than other simplified SOM methods.


international conference on computer design | 2012

Adaptive memory architecture for real-time image warping

Andy Motten; Luc Claesen; Yun Pan

This paper presents a real time image warping module implemented in hardware. A look-up table (LUT) based reverse mapping is used to relate the source image to the warped image. Frame buffers or line buffers are often used to temporally store the source image. However these methods do not take the underlying pattern of the reverse mapping coordinates into account. The presented architecture uses an adaptable memory allocation which can change the depth and the position of the line buffer between lines. A real-time stereo rectification use case has been implemented to validate the operation of this module. Depending on the scenario, the memory consumption can be reduced by a factor of two and more. A real-time image warping module for video cameras has been implemented in a single FPGA, without the use of off-chip memories.

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Joos Vandewalle

Katholieke Universiteit Leuven

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