Luca Santinelli
Sant'Anna School of Advanced Studies
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Publication
Featured researches published by Luca Santinelli.
euromicro conference on real-time systems | 2012
Liliana Cucu-Grosjean; Luca Santinelli; Michael Houston; Code Lo; Tullio Vardanega; Leonidas Kosmidis; Jaume Abella; Enrico Mezzetti; Eduardo Quiñones; Francisco J. Cazorla
The rigorous application of static timing analysis requires a large and costly amount of detail knowledge on the hardware and software components of the system. Probabilistic Timing Analysis has potential for reducing the weight of that demand. In this paper, we present a sound measurement-based probabilistic timing analysis technique based on Extreme Value Theory. In all the experiments made as part of this work, the timing bounds determined by our technique were less than 15% pessimistic in comparison with the tightest possible bounds obtainable with any probabilistic timing analysis technique. As a point of interest to industrial users, our technique also requires a comparatively low number of measurement runs of the program under analysis, less than 650 runs were needed for the benchmarks presented in this paper.
ACM Transactions in Embedded Computing Systems | 2013
Francisco J. Cazorla; Eduardo Quiñones; Tullio Vardanega; Liliana Cucu; Benoit Triquet; Guillem Bernat; Emery D. Berger; Jaume Abella; Franck Wartel; Michael Houston; Luca Santinelli; Leonidas Kosmidis; Code Lo; Dorin Maxim
Static timing analysis is the state-of-the-art practice of ascertaining the timing behavior of current-generation real-time embedded systems. The adoption of more complex hardware to respond to the increasing demand for computing power in next-generation systems exacerbates some of the limitations of static timing analysis. In particular, the effort of acquiring (1) detailed information on the hardware to develop an accurate model of its execution latency as well as (2) knowledge of the timing behavior of the program in the presence of varying hardware conditions, such as those dependent on the history of previously executed instructions. We call these problems the timing analysis walls. In this vision-statement article, we present probabilistic timing analysis, a novel approach to the analysis of the timing behavior of next-generation real-time embedded systems. We show how probabilistic timing analysis attacks the timing analysis walls; we then illustrate the mathematical foundations on which this method is based and the challenges we face in the effort of efficiently implementing it. We also present experimental evidence that shows how probabilistic timing analysis reduces the extent of knowledge about the execution platform required to produce probabilistically accurate WCET estimations.
euromicro conference on real-time systems | 2013
Robert I. Davis; Luca Santinelli; Sebastian Altmeyer; Claire Maiza; Liliana Cucu-Grosjean
This paper integrates analysis of probabilistic cache related pre-emption delays (pCRPD) and static probabilistic timing analysis (SPTA) for multipath programs running on a hardware platform that uses an evict-on-miss random cache replacement policy. The SPTA computes an upper bound on the probabilistic worst-case execution time (pWCET) of the program, which is an exceedance function giving the probability that the execution time of the program will exceed any given value on any particular run. The pCRPD analysis determines the maximum effect of a pre-emption on the pWCET. The integration between SPTA and pCRPD updates the pWCET to account for the effects of one or more pre-emptions at any arbitrary points in the program. This integration is a necessary step enabling effective schedulability analysis for probabilistic hard real-time systems that use pre-emptive or co-operative scheduling. The analysis is illustrated via a number of benchmark programs.
real-time systems symposium | 2009
Kai Huang; Luca Santinelli; Jian-Jia Chen; Lothar Thiele; Giorgio C. Buttazzo
Power dissipation has constrained the performance boosting of modern computer systems in the past decade. Dynamic power management has been widely applied to change the system (or device) state dynamically to reduce the power consumption. This paper explores how to effectively reduce the energy consumption to handle event streams with hard real-time guarantees. We adopt Real-Time Calculus to describe the event arrival and resource service by arrival curves and service curves in the interval domain, respectively. We develop online algorithms to adaptively control the power mode of the device, postponing the processing of arrival events as late as possible. Profited from the worst-case interval-based abstraction, our algorithms can on one hand tackle arbitrary event arrivals (even with burstiness) and on the other hand guarantee hard real-time requirements in terms of both timing and backlog constraints. We also present simulation results to demonstrate the effectiveness of our algorithms.
Real-time Systems | 2011
Kai Huang; Luca Santinelli; Jian-Jia Chen; Lothar Thiele; Giorgio C. Buttazzo
Power dissipation has been an important design issue for a wide range of computer systems in the past decades. Dynamic power consumption due to signal switching activities and static power consumption due to leakage current are the two major sources of power consumption in a CMOS circuit. As CMOS technology advances towards deep sub-micron domain, static power dissipation is comparable to or even more than dynamic power dissipation. This article explores how to apply dynamic power management to reduce static power for hard real-time systems. We propose online algorithms that adaptively control the power mode of a system, procrastinating the processing of arrived events as late as possible. To cope with multiple event streams with different characteristics, we provide solutions for preemptive earliest-deadline-first and fixed-priority scheduling policies. By adopting a worst-case interval-based abstraction, our approach can not only tackle arbitrary event arrivals, e.g., with burstiness, but also guarantee hard real-time requirements with respect to both timing and backlog constraints. We also present extensive simulation results to demonstrate the effectiveness of our approaches.
Proceedings of the 20th International Conference on Real-Time and Network Systems | 2012
Dorin Maxim; Michael Houston; Luca Santinelli; Guillem Bernat; Robert I. Davis; Liliana Cucu-Grosjean
Guaranteeing timing constraints is the main purpose of analyses for real-time systems. The satisfaction of these constraints may be verified with probabilistic methods (relying on statistical estimations of certain task parameters) offering both hard and soft guarantees. In this paper, we address the problem of sampling applied to the distributions of worst-case execution times. The pessimism of presented sampling techniques is then evaluated at the level of response times.
worst case execution time analysis | 2014
Luca Santinelli; Jérôme Morio; Guillaume Dufour; Damien Jacquemart
Measurement-based approaches with extreme value worst-case estimations are beginning to be proficiently considered for timing analyses. In this paper, we intend to make more formal extreme value theory applicability to safe worst-case execution time estimations. We outline complexities and challenges behind extreme value theory assumptions and parameter tuning. Including the knowledge requirements, we are able to conclude about safety of the probabilistic worst-case execution estimations from the extreme value theory, and execution time measurements.
conference on decision and control | 2009
Kai Huang; Luca Santinelli; Jian-Jia Chen; Lothar Thiele; Giorgio C. Buttazzo
Power dissipation has constrained the performance boosting of modern computer systems in the past decade. Dynamic power management (DPM) has been implemented in many systems to change the system (or device) state dynamically to reduce the power consumption. This paper explores how to efficiently and effectively reduce the energy consumption to handle event streams with hard real-time or quality of service (QoS) guarantees. We adopt Real-Time Calculus to describe the event arrival by arrival curves in the interval domain. To reduce the implementation overhead, we propose a periodic scheme to determine when to turn on/off the system (or device). This paper first presents two approaches to derive periodic scheme to cope with systems with only one event stream, in which one approach derives an optimal solution for periodic power management with higher complexity and the other derives approximated solutions with lower complexity. Then, extensions are proposed to deal with multiple event streams. Simulation results reveal the effectiveness of our approaches.
asia and south pacific design automation conference | 2010
Andreas Schranzhofer; Jian-Jia Chen; Luca Santinelli; Lothar Thiele
— Multi-Processor Systems-on-Chip (MPSoC) are an increasingly important design paradigm not only for mobile embedded systems but also for industrial applications such as automotive and avionic systems. Such systems typically execute multiple concurrent applications, with different execution modes. Modes define differences in functionality and computational resource demands and are assigned with an execution probability. We propose a dynamic mapping approach to maintain low power consumption over the system lifetime. Mapping templates for different application modes and execution probabilities are computed offline and stored on the system. At runtime a manager monitors the system and chooses an appropriate pre-computed template. Experiments show that our approach outperforms global static mapping approaches up to 45%.
real time technology and applications symposium | 2011
Luca Santinelli; Giorgio C. Buttazzo; Enrico Bini
Often real-time systems can run in different modes depending on the external environment or their internal state. Each operational mode is characterized by a set of tasks with different computational demand, resource requirements, and resource availability. When resource reservation is used to achieve temporal isolation among applications, the reservation parameters may need to change from mode to mode. Hence, an additional guarantee is required to ensure feasibility not only of the applications, but also of the reservations. This paper presents a schedulability analysis to predict the timing behavior of a multi-moded resource reservation, whose parameters may change due to a mode transition. Resource provisioning is analyzed in all the operational modes and also during mode-changes in order to guarantee a minimum amount of resources and derive a feasibility condition for realtime applications and reservations. Theoretical results are also illustrated with examples and test cases.