Luigi Pascucci

Interleaved memory device for burst type access in synchronous read mode with the two semi-arrays independently readable in random access asynchronous mode

Interlaced memory device with random or sequential access

NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MONOLITHICALLY INTEGRATED ON SEMICONDUCTOR

Regulation of the output voltage of a voltage multiplier

Standby voltage boosting stage and method for a memory device

Sense circuit for reading data stored in nonvolatile memory cells

Anti-noise and auto-stand-by memory architecture

CMOS voltage multiplier

Zero-consumption power-on reset circuit

Internal timing method and circuit for programmable memories