Luis H. C. Ferreira

An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA With Rail-to-Rail Input/Output Swing

An ultra-low-voltage ultra-low-power CMOS Miller operational transconductance amplifier (OTA) with rail-to-rail input/output swing is presented. The topology is based on combining bulk-driven differential pair and dc level shifters, with the transistors work in weak inversion. The improved Miller OTA has been successfully verified in a standard 0.35-mum CMOS process. Experimental results have confirmed that, at a minimum supply voltage of 600 mV, lower than the threshold voltage, the topology presents almost rail-to-rail input and output swings and consumes only 550 nW.

A 60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process

This paper presents a 60-dB gain bulk-driven Miller OTA operating at 0.25-V power supply in the 130-nm digital CMOS process. The amplifier operates in the weak-inversion region with input bulk-driven differential pair sporting positive feedback source degeneration for transconductance enhancement. In addition, the distributed layout configuration is used for all the transistors to mitigate the effect of halo implants for higher output impedance. Combining these two approaches, we experimentally demonstrate a high gain of over 60-dB with just 18-nW power consumption from 0.25-V power supply. The use of enhanced bulk-driven differential pair and distributed layout can help overcome some of the constraints imposed by nanometer CMOS process for high performance analog circuits in weak inversion region.

An Ultra Low-Voltage Ultra Low-Power CMOS Threshold Voltage Reference

This paper describes a CMOS voltage reference that makes use of weak inversion CMOS transistors and linear resistors, without the need for bipolar transistors. Its operation is analogous to the bandgap reference voltage, but the reference voltage is based on the threshold voltage of an nMOS transistor. The circuit implemented using 0.35 μm n-well CMOS TSMC process generates a reference of 741 mV under just 390 nW for a power supply of only 950 mV. The circuit presented a variation of 39 ppm/°C for the -20°C to +80°C temperature range, and produced a line regulation of 25 mV/V for a power supply of up to 3 V.

A 0.25-V 28-nW 58-dB Dynamic Range Asynchronous Delta Sigma Modulator in 130-nm Digital CMOS Process

In this paper, we present a single-bit clock-less asynchronous delta-sigma modulator (ADSM) operating at just 0.25 V power supply. Several circuit approaches were employed to enable such low-voltage operation and maintain high performance. One approach involved utilizing bulk-driven transistors in subthreshold region with transconductance-enhancement topology. Another approach was to employ distributed transistor layout structure to mitigate the effect of low output impedance due to halo drain implants employed in todays digital CMOS process. The ADSM achieved a characteristic center frequency of 630 Hz. It had an effective signal-to-noise-plus-distortion ratio (SNDR) of 58 dB or effective number of bits (ENOB) 9 b and just 28-nW power dissipation. A detailed analytical model capturing the effect of nonidealities of the individual circuit components is also presented for the first time with a close agreement with experimental results.

An Improved Analytical PID Controller Design for Non-Monotonic Phase LTI Systems

An improved technique of analytical design of proportional-integral-derivative (PID) controllers in frequency-domain for non-monotonically decreasing phase systems by means of gain crossover frequency and phase margin specifications is presented in this brief. The proposed method guarantees a minimum phase margin inside the desired bandwidth, assuring better performance to step response for the closed-loop system. In order to achieve this feature, it is necessary to redefine the concept of phase margin when the uncontrolled process presents a non-monotonically decreasing phase inside the bandwidth. Hence, the phase margin can still be used as a good robustness indicator and allows the Bode stability criterion to be used for monotonic minimum-phase or non-monotonic minimum-phase systems.

A 60-dB Gain OTA operating at 0.25-V power supply in 130-nm digital CMOS process

This paper presents a 60-dB gain bulk-driven Miller OTA operating at 0.25-V power supply in the 130-nm digital CMOS process. The amplifier operates in the weak-inversion region with input bulk-driven differential pair sporting positive feedback source degeneration for transconductance enhancement. In addition, the distributed layout configuration is used for all the transistors to mitigate the effect of halo implants for higher output impedance. Combining these two approaches, we experimentally demonstrate a high gain of over 60-dB with just 18-nW power consumption from 0.25-V power supply. The use of enhanced bulk-driven differential pair and distributed layout can help overcome some of the constraints imposed by nanometer CMOS process for high performance analog circuits in weak inversion region.

On the Properties of Augmented Open-Loop Stable Plants Using LQG/LTR Control

In this technical note are presented new properties on the application of the continuous- and discrete-time LQG/LTR control methodology when an open-loop stable process plant is augmented by integrators and a specific choice of design parameters is made. It is shown that the target feedback loop transfer matrix is made equal to a diagonal transfer matrix of integrators with specifiable gains, guaranteeing equal and decoupled responses in each of the systems outputs.

Design and implementation of a PID control system for a coaxial two-wheeled mobile robot

This paper presents the design of a control system for a coaxial two-wheeled inverted pendulum robot. The control strategy implemented was developed based on a dynamic model of the robot that takes into consideration its three degrees of freedom, and consists of two decoupled PID controllers, tuned by Ziegler-Nichols technique. Such strategy is responsible for controlling the robots pitch motion and linear positioning regardless of its yaw motion, ensuring system stability, proper set-points tracking and disturbances rejection.

A hybrid multi-tanh bulk-driven input stage OTA for Low-THD biomedical G m -C applications

In this paper a hybrid multi-tanh bulk-driven input stage OTA for low total harmonic distortion (THD) biomedical Gm-C applications in weak inversion is presented. The proposed OTA was successfully simulated in an 130-nm IBM CMOS process. The simulations show an open loop gain of 46.4 dB and a unit gain frequency of 125 Hz with only 500 mV of power supply voltage and just 25 nW of power consumption. The transconductance is 24 nS with 300 mVpp of linear input range (HD3 ≤ - 60 dB), which is suitable for low-frequency and low-THD biomedical Gm-C applications.

A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correction

This work describes a new topology for CMOS sample-and-hold circuits in low voltage with self-correction of the offset voltage caused by mismatches in the differential input pair of the operational amplifier. The charge injection of the NMOS switches, although not properly modeled by the simulators, is an important factor and it is minimized in this topology. The results were obtained using the ACCUSIM II simulator on the AMS CMOS 0.8 /spl mu/m CYE and they reveal the circuit has a reduced error of just 0.03% at the output.