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Luiz A. Barroso

Hewlett-Packard

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Publication

Featured researches published by Luiz A. Barroso.

Archive | 2001

Method and system for exclusive two-level caching in a chip-multiprocessor

Luiz A. Barroso; Kourosh Gharachorloo; Andreas Nowatzyk

Archive | 2001

Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants

Luiz A. Barroso; Kourosh Gharachorloo; Andreas Nowatzyk; Mosur K. Ravishankar; Robert J. Stets

Archive | 2001

Cache coherence protocol engine system and method for processing memory transaction in distinct address subsets during interleaved time periods in a multiprocessor system

Kourosh Gharachorloo; Luiz A. Barroso; Mosur K. Ravishankar; Robert J. Stets; Andreas Nowatzyk

Archive | 2002

System for handling coherence protocol races in a scalable shared memory system based on chip multiprocessing

Luiz A. Barroso; Kourosh Gharachorloo; Andreas Nowatzyk; Robert J. Stets; Mosur K. Ravishankar

Archive | 2001

System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system

Kourosh Gharachorloo; Luiz A. Barroso; Robert J. Stets; Mosur K. Ravishankar; Andreas Nowatzyk

Archive | 2001

System and method for generating cache coherence directory entries and error correction codes in a multiprocessor system

Luiz A. Barroso; Kourosh Gharachorloo; Andreas Nowatzyk

Archive | 2001

Scalable multiprocessor system and cache coherence method

Kourosh Gharachorloo; Luiz A. Barroso; Mosur K. Ravishankar; Robert J. Stets; Daniel J. Scales

Archive | 2002

Method and system for detecting and resolving virtual address synonyms in a two-level cache hierarchy

Luiz A. Barroso; Kourosh Gharachorloo; Andreas Nowatzyk; Robert J. Stets; Mosur K. Ravishankar

Archive | 2002

Scalable multiprocessor system and cache coherence method incorporating invalid-to-dirty requests

Kourosh Gharachorloo; Luiz A. Barroso; Mosur K. Ravishankar; Robert J. Stets; Daniel J. Scales

Archive | 2002

System for minimizing directory information in scalable multiprocessor systems with logically independent input/output nodes

Kourosh Gharachorloo; Luiz A. Barroso; Daniel J. Scales

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Kourosh Gharachorloo

Hewlett-Packard

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Robert J. Stets

Hewlett-Packard

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Mosur K. Ravishankar

Hewlett-Packard

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Andreas Nowatzyk

Hewlett-Packard

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Daniel J. Scales

Hewlett-Packard

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