Lukasz Butkowski

Real time control of RF fields using a MicroTCA.4 based LLRF system at FLASH

The Free Electron Laser in Hamburg (FLASH) is a large scale user facility, providing highly stable and brilliant laser pulses down to a wavelength of 4.1 nm. Essential for stable and reproducible photon beam is the precision control of the electron bunch parameters. The acceleration principle of the electron bunches at FLASH is based on superconducting RF technology (SRF), in which the RF fields are controlled by a digital low level RF (LLRF) system. This system has been recently upgraded to the Micro Telecommunication Computing Architecture (MicroTCA.4) to improve the performance of the field regulation. This paper presents the first measurements and operation experiences using this new electronic crate standard at a large scale research facility. RF field regulation is carried out by real time fast digital processing on several boards in a MicroTCA.4 crate, and slow automation routines running on a dual core i7 front-end CPU. Scalability and modularity of this system is one of the key parameters to meet the next steps, namely being the platform standard for the European X-ray free electron laser currently build at DESY.

MicroTCA.4-Based RF and Laser Cavities Regulation Including Piezocontrols

In this paper, we present an universal solution for radio frequency (RF) and laser cavities regulation, including piezocontrols and drivers based on MicroTCA.4 electronics. The control electronics consists of an Analog to Digital Converter-advanced mezzanine card (AMC) with an analog rear transmission module (RTM) to downmix and measure the RF signals and a low cost AMC-based Field Programmable Gate Array mezzanine card carrier for fast data processing and digital feedback operation connected to an RTM piezodriver. For the RF cavity regulation, the piezodriver includes additional inputs to use piezoelements as active force sensors. The fine tuning of the laser is carried out using a cavity fiber stretcher. The coarse tuning of the supported optics is done using a piezomotor-driven linear stage. Both channels can be operated using digital feedback controllers. First, results from continuous wave operation of the RF field controller and the cavity active resonance control with the piezotuners are demonstrated. The laser lock application performance using both fine and coarse channel feedbacks is shown and briefly discussed.

A Model-Based Fast Protection System for High-Power RF Tube Amplifiers Used at the European XFEL Accelerator

The driving engine of the superconducting accelerator of the European X-ray free electron laser (XFEL) is a set of 27 radio frequency (RF) stations. Each of the underground RF stations consists of a multibeam horizontal klystron that can provide up to 10 MW of power at 1.3 GHz. Klystrons are sensitive devices with a limited lifetime and a high mean time between failures. In real operation, the lifetime of the tube can be significantly reduced because of failures. The special fast protection klystron lifetime management (KLM) system has been developed to minimize the influence of service conditions on the lifetime of klystrons. The main task of this system is to detect all events which can destroy the tube as quickly as possible, and switch off the driving RF signal or the high voltage. Detection of events is based on a comparison of the value of the real signal obtained at the system output with the value estimated on the basis of a high-power RF amplifier model and input signals. The KLM system has been realized in field-programmable gate array (FPGA) and implemented in XFEL. Implementation is based on the standard low-level RF micro telecommunications computing architecture (MTCA.4 or xTCA). The main part of the paper focuses on an estimation of the klystron model and the implementation of KLM in FPGA. The results of the performance of the KLM system will also be presented.

Design and Operation of the Integrated 1.3 GHz Optical Reference Module with Femtosecond Precision

In modern Free-Electron Lasers like FLASH or the European XFEL, the short and long-term stability of RF reference signals gains in importance. The requirements are driven by the demand for short FEL pulses and low-jitter FEL operation. In previous publications, a novel, integrated Mach-Zehnder Interferometer based scheme for a phase detector between the optical and the electrical domain was presented and evaluated. This Laser-to-RF phase detector is the key component of the integrated 1.3GHz Optical Reference Module (REFM-OPT) for FLASH and the European XFEL. The REFMOPT will phase-stabilize 1.3GHz RF reference signals to the pulsed optical synchronization systems in these accelerators. Design choices in the final hardware configuration are presented together with measurement results and a performance evaluation from the first operation period in the European XFEL.

Extended abstract for model based fast protection system for high power RF tube amplifiers used at European XFEL accelerator

The driving engine of the superconducting accelerator of the European X-ray Free-Electron Laser (XFEL) are 27 Radio Frequency (RF) stations. Each of an underground RF station consists from multi-beam horizontal klystron which can provide up to 10MW of power at 1.3GHz. Klystrons are sensitive devices with limited lifetime and high mean time between failures. In the real operation the lifetime of the tube can be thoroughly reduced by failures. To minimize the influence of service conditions to the klystrons lifetime the special fast protection system named as Klystron Lifetime Management System (KLM) has been developed. The main task of this system is to detect all events which can destroy the tube as quickly as possible and switch off driving RF signal or HV. Detection of events is based on comparison of model of high power RF amplifier with real signals. Implementation is done in Field Programmable Gate Array (FPGA). For the XFEL implementation of KLM is based on the standard Low Level RF (LLRF) Micro Tele-communications Computing Architecture (MTCA.4 or xTCA). This article focuses on the klystron model estimation and implementation of KLM in FPGA. Results of the system implemented on MTCA.4 architecture will be presented in the end.

FPGA based RF and piezo controllers for SRF cavities in CW mode

Modern digital low level radio frequency (LLRF) control systems used to stabilize the accelerating field in facilities such as Free Electron Laser in Hamburg (FLASH) or European X-Ray Free Electron Laser (E-XFEL) are based on the Field Programmable Gate Array (FPGA) technology. Presently these accelerator facilities are operated with pulsed RF. In future, these facilities should be operated with continuous wave (CW) which requires significant modifications on the real-time feedbacks realized within the FPGA. For example, higher loaded quality factor of the cavities when operated in a CW mode requires sophisticated resonance control methods. However, iterative learning techniques widely used for machines operated in pulsed mode are not applicable for CW. In addition, the mechanical characteristic of the cavities have now a much more important impact on the choice of the feedback scheme. To overcome the limitations of classical PI-controllers novel realtime adaptive feed forward algorithm is implemented in the FPGA. Also, the high power RF amplifier which is an inductive output tube (IOT) for continuous wave operation instead of a klystron for the pulsed mode has major impact on the design and implementation of the firmware for regulation. In this paper, we report on our successful approach to control multi-cavities with ultra-high precision (dA/A<;0.01%, dphi<;0.02 deg) using a single IOT source and individual resonance control through piezo actuators. Performance measurements of the proposed solution were conducted at Cryo Module Test Bench (CMTB) facility.

Rapid-X - An FPGA Development Toolset Using a Custom Simulink Library for MTCA.4 Modules

The recent introduction of advanced hardware architectures such as the Micro Telecommunications Computing Architecture (MTCA) caused a change in the approach to implementation of control schemes in many fields. The development has been moving away from traditional programming languages ( C/C++), to hardware description languages (VHDL, Verilog), which are used in FPGA development. With MATLAB/Simulink it is possible to describe complex systems with block diagrams and simulate their behavior. Those diagrams are then used by the HDL experts to implement exactly the required functionality in hardware. Both the porting of existing applications and adaptation of new ones require a lot of development time from them. To solve this, Xilinx System Generator, a toolbox for MATLAB/Simulink, allows rapid prototyping of those block diagrams using hardware modelling. It is still up to the firmware developer to merge this structure with the hardware-dependent HDL project. This prevents the application engineer from quickly verifying the proposed schemes in real hardware. The framework described in this article overcomes these challenges, offering a hardware-independent library of components that can be used in Simulink/System Generator models. The components are subsequently translated into VHDL entities and integrated with a pre-prepared VHDL project template. Furthermore, the entire implementation process is run in the background, giving the user an almost one-click path from control scheme modelling and simulation to bit-file generation. This approach allows the application engineers to quickly develop new schemes and test them in real hardware environment. The applications may range from simple data logging or signal generation ones to very advanced controllers. Taking advantage of the Simulink simulation capabilities and user-friendly hardware implementation routines, the framework significantly decreases the development time of FPGA-based applications.

Rapid FPGA development framework using a custom Simulink library for MTCA.4 modules

The recent introduction of advanced hardware architectures such as the Micro Telecommunications Computing Architecture (MTCA) caused a change in the approach to implementation of control schemes in many fields. It required the development to move away from traditional programming languages (C/C++) to hardware description languages (VHDL, Verilog), which are used in FPGA development. With MATLAB/Simulink it is possible to describe complex systems with block diagrams and simulate their behavior. Those diagrams are then used by the HDL experts, to implement exactly the required functionality in hardware. Both the porting of existing applications and adaptation of new ones requires a lot of development time from them. To solve this, Xilinx System Generator, a toolbox for MATLAB/Simulink, allows rapid prototyping of those block diagrams using hardware modelling. It is still up to the firmware developer to merge this structure with the hardware-dependent HDL project. This prevents the application engineer from quickly verifying the proposed schemes in real hardware. The framework described in this article overcomes these challenges, offering a hardware-independent library of components that can be used in Simulink/System Generator models. The components are subsequently translated into VHDL entities and integrated with a pre-prepared VHDL project template. Furthermore, the entire implementation process is run in the background, giving the user an almost one-click path from control scheme modelling and simulation to bit-file generation. This approach allows the control theory engineers to quickly develop new schemes and test them in real hardware environment. The applications may range from simple data logging or signal generation ones to very advanced controllers. Taking advantage of the Simulink simulation capabilities and user-friendly hardware implementation routines, the framework significantly decreases the development time of FPGA-based applications.