Luo Le

Electroplated indium bump arrays and the bonding reliability

A novel electroplating indium bumping process is described, as a result of which indium bump arrays with a pitch of 100 μm and a diameter of 40 μm were successfully prepared. UBM (under bump metallization) for indium bumping was investigated with an XRD technique. The experimental results indicate that Ti/Pt (300 A / 200 A) has an excellent barrier effect both at room temperature and at 200 °C. The bonding reliability of the indium bumps was evaluated by a shear test. Results show that the shear strength of the indium bump significantly increases after the first reflow and then changes slowly with increasing reflow times. Such a phenomenon may be caused by the change in textures of the indium after reflow. The corresponding flip-chip process is also discussed in this paper.

Thermal analysis for multichip module using computational fluid dynamic simulation

With the increasing heat flux at the chip and package levels, computational fluid dynamic (CFD) simulation is becoming more popular and important for estimating thermal performance of high density electronic packages. In this study, a series of similar experiments are conducted to validate the CFD numerical simulation method, and then a three-dimensional CFD model is established to investigate the temperature distribution and thermal characteristics of indirect liquid cooling for a seven-chip multichip module which is applied in a kind of supercomputer. The effects of material properties of thermal grease and thermal interface material, package geometry such as thickness of chips, space between chips, solder bump and solder ball patterns, flow rate and inlet liquid temperature on the maximum chip temperature are also presented. The results obtained from the simulation are of great value in suggesting design of multichip module.

The effects of cure temperature history on the stability of polyimide films

The effects of cure temperature history on the stability of hinged structure poly (4,4-oxydiphenylene pyromellitimide) (PMDA-ODA) polyimide were studied by dynamic mechanical analysis. The polyimide films were cured under different curing conditions and peeled off by substrate etching. It was found that a proper cure time and temperature ramp rate improves the stability in terms of higher glass transition temperature. Ninety minutes at 375 °C or 200 °C is a beneficial high glass transition temperature. The temperature ramp rate should be between 2 °C/min and 10 °C/min, which is neither too high nor too low.

A wafer-level 3D packaging structure with Benzocyclobutene as a dielectric for multichip module fabrication

A new wafer-level 3D packaging structure with Benzocyclobutene (BCB) as interlayer dielectrics (ILDs) for multichip module fabrication is proposed for application in the Ku-band wave. The packaging structure consists of two layers of BCB films and three layers of metallized films, in which the monolithic microwave IC (MMIC), thin film resistors, striplines and microstrip lines are integrated. Wet etched cavities fabricated on the silicon substrate are used for mounting active and passive components. BCB layers cover the components and serve as ILDs for interconnections. Gold bumps are used as electric interconnections between different layers, which eliminates the need to prepare vias by costly dry etching and deposition processes. In order to get high-quality BCB films for the subsequent chemical mechanical planarization (CMP) and multilayer metallization processes, the BCB curing profile is optimized and the roughness of the BCB film after the CMP process is kept lower than 10 nm. The thermal, mechanical and electrical properties of the packaging structure are investigated. The thermal resistance can be controlled below 2 °C/W. The average shear strength of the gold bumps on the BCB surface is around 70 N/mm2. The performances of MMIC and interconnection structure at high frequencies are optimized and tested. The S-parameters curves of the packaged MMIC shift slightly showing perfect transmission character. The insertion loss change after the packaging process is less than 1 dB range at the operating frequency and the return loss is less than –8 dB from 10 to 15 GHz.

Fabrication of a microstrip patch antenna integrated in low-resistance silicon wafer using a BCB dielectric

This paper demonstrates a technique for microstrip patch antenna fabrication using a benzocyclobutene (BCB) dielectric. The most distinctive feature of this method is that the antenna is integrated on a low-resistance silicon wafer, and is fully compatible with the microwave multi-chip module packaging process. Low-permittivity dielectric BCB with excellent thermal and mechanical stability is employed to enhance the performance of the antenna. The as-fabricated antenna is characterized, and the experimental results show that the antenna resonates at 14.9 GHz with a 1.67% impedance bandwidth.