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Luverne Ray Peterson

Unisys

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Publication

Featured researches published by Luverne Ray Peterson.

Archive | 1987

Memory system employing a low DC power gate array for error correction

Luverne Ray Peterson; Stephen Jan Chung Chan

Archive | 1993

Self-calibrating clock circuit employing a continuously variable delay module in a feedback loop

Luverne Ray Peterson

Archive | 1987

Fast multiplier circuit incorporating parallel arrays of two-bit and three-bit adders

Luverne Ray Peterson; Michael A. Rehart

Archive | 1992

Digital adder having a high-speed low-capacitance carry bypass signal path

Luverne Ray Peterson; Laurence P. Flora

Archive | 1989

Digital signal translator having compensation for P-channel and N-channel threshold voltage shifts

Luverne Ray Peterson

Archive | 1992

Random access compare array

Luverne Ray Peterson; Cevat Kumbasar

Archive | 1994

Control module for reducing ringing in digital signals on a transmission line

Luverne Ray Peterson

Archive | 1992

Direktzugriffvergleichsmatrix Direct access comparison matrix

Luverne Ray Peterson; Cevat Kumbasar

Archive | 1992

Digitaler addierer mit hohem geschwindigkeitsnachrichtenweg bei niedrigem kapazitäts - "carry bypass". Digital adder high geschwindigkeitsnachrichtenweg at low capacitance - "carry bypass".

Luverne Ray Peterson; Laurence P. Flora

Archive | 1988

Fast multiplier circuit

Luverne Ray Peterson; Michael A. Rehart

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Cevat Kumbasar

Unisys

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Laurence P. Flora

Unisys

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Michael A. Rehart

Unisys

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Stephen Jan Chung Chan

Unisys

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