M. Hack

LASER DEHYDROGENATION/CRYSTALLIZATION OF PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITED AMORPHOUS SILICON FOR HYBRID THIN FILM TRANSISTORS

A low temperature process for laser dehydrogenation and crystallization of hydrogenated amorphous silicon (a‐Si:H) has been developed. This process removes hydrogen by laser irradiations at three energy steps. Studies of hydrogen out‐diffusion and microstructure show that hydrogen out‐diffusion depends strongly on film structure and the laser energy density. Both high quality and low leakage bottom gate polycrystalline silicon and a‐Si:H thin film transistors were monolithically fabricated on the same Corning 7059 glass substrate with a maximum process temperature of only 350 °C.

GRAIN GROWTH IN LASER DEHYDROGENATED AND CRYSTALLIZED POLYCRYSTALLINE SILICON FOR THIN FILM TRANSISTORS

Selective dehydrogenation and crystallization are realized by a three‐step incremental increase in laser energy density. X‐ray diffraction and transmission electron microscopy show that the polycrystalline grains formed with this three‐step process are similar to those after a conventional one‐step laser crystallization of unhydrogenated amorphous silicon. The grain size increases with increasing laser energy density up to a peak value of a few micrometers. The grain size decreases with further increases in laser energy density. The transistor field effect mobility is correlated to the material properties, increasing gradually with laser energy density until reaching its maximum value. Thereafter, the transistors suffer from leakage through the gate insulators. A dual dielectric gate insulator has been developed for these bottom‐gate thin film transistors. Our structure simplifies fabrication of both high quality amorphous and polycrystalline thin film transistors on the same glass substrate. We discuss t...

Simulations of short‐channel and overlap effects in amorphous silicon thin‐film transistors

Through the use of two‐dimensional computer simulations, we study short‐channel and overlap effects in amorphous silicon thin‐film transistors. As large‐area fabrication techniques can lead to conductive source‐drain overlaps being deposited on a portion of the upper passivation layer of inverted‐gate thin‐film transistors, it is important to understand how these overlaps affect performance. In saturation, charge accumulates under the drain overlap shortening the effective channel length. We contrast the performance of thin‐film transistors with and without overlaps as a function of gate length.

Analysis of double injection transients in amorphous silicon p‐i‐n diodes

In this article we present results of both experimental and computer modeling studies of transient double injection currents in amorphous silicon p‐i‐n diodes. After the application of a forward bias step pulse, the current decays until there is a sudden sharp rise, often by two to three orders of magnitude. The delay time for this current increase varies from microseconds to many milliseconds, and it is found to be strongly dependent on the pulse repetition rate, applied bias, degradation state of the sample, and illumination. Our results are in good agreement with computer simulations of these phenomena. The sudden current rise is associated with a change in transport mechanism from electron space‐charge limited current flow to bipolar recombination limited current flow. Experimentally and theoretically it is found that in a degraded device the delay time is also very dependent on the spatial position of the metastable defects, with those near the n+ contact having a much more dominant effect than those...

Below threshold conduction in a‐Si:H thin film transistors with and without a silicon nitride passivating layer

We report temperature measurements of inverted staggered amorphous silicon thin film transistor subthreshold conductance for devices with and without a top silicon nitride passivating layer. Subthreshold conductance activation energies clearly show the different conductance paths in the active layer of these devices. Transistors with no top nitride layer conduct in the bulk amorphous silicon, whereas the devices with a top nitride layer conduct at the interface between the amorphous silicon and the top nitride (a ‘‘back’’ channel). Gate bias stressing and light soaking experiments uphold the existence of the back channel. We also present two‐dimensional simulations that support our interpretation of the experimental data.

Integrated conventional and laser re-crystallised amorphous silicon thin film transistors for large area imaging and display applications

Abstract In this paper we present experimental data on the integration of conventional high quality bottom gate amorphous silicon (a-Si) thin film transistors (TFTs), together with devices recrystallised by an excimer laser, both on the same glass substrate. The maximum substrate temperature is 350°C and the same gate dielectric and silicon layers are used for both types of transistors. The recrystallised a-Si devices, now poly-Si TFTs, only require one extra masking step and have field-effect mobilities around 20–30 cm 2 /Vs, threshold voltages of 0–3 Volts, with leakage currents of 10 −12 A/μm at 10V drain to source bias, while the amorphous devices remain essentially unchanged by the recrystallization process. We demonstrate the viability of the integration of these devices for use in large area arrays.

Numerical simulations of amorphous silicon thin‐film transistors

In this paper we present results of two‐dimensional numerical simulations of low voltage, high voltage, and vertical amorphous silicon transistors. The model input consists of one realistic density of states spectrum for undoped amorphous silicon, and one self‐consistent set of model parameters for all devices. Our results are in good agreement with experimental data, and this good fit is based on a new model for the source and drain contacts. Our approach is to treat these contacts as consisting of a fixed resistance in series with a small potential barrier whose height is modulated by current flow. Finally we show that relatively small changes in the density of deep localized states significantly alter the simulated device characteristics.

Saturation and recovery kinetics of current-induced defects in a-Si:H

The defect density in a-Si:H is obtained from the reverse bias current and transient forward current in pi-n devices. The kinetics of current-induced and light-induced metastable defect creation are compared, and current-induced defect recovery is reported. Computer modelling identifies the delay in the onset of the forward current as a suppression of the double injection current due to charge trapped in defects.

Vertical amorphous silicon thin‐film transistors

A vertical amorphous silicon thin‐film transistor that has a very short channel length that is determined by deposition, not lithography, is described. These transistors have a field‐effect mobility of approximately 0.5 cm2 /V s, an effective channel length of 1.5 μm, and a dynamic range of over five orders of magnitude. A method for suppressing excessive leakage currents and improving the saturation of the output characteristics by a novel current‐blocking technique is shown. A two‐dimensional computer program is used to analyze these devices and guide their design and optimization. Unlike a conventional thin‐film transistor, the current path is primarily parallel to the electric field created by an insulated gate electrode. These vertical transistors are easy to fabricate, compatible with large‐area processing techniques, and have suitable terminal characteristics for use in practical circuits.

Laser Dehydrogenation of PECVD Amorphous Silicon

A low temperature process for laser dehydrogenation and crystallization of hydrogenated amorphous silicon has been studied. The key feature of this process is the removal of hydrogen from the amorphous silicon thin films while crystallizing the films at the same time. Studies of transient phenomena, hydrogen loss, and crystallinity, using transient reflectivity analyses, transmission electron microscopy and quadrupole mass spectrometry, find that hydrogen out-diffusion depends strongly on film structure and the melt duration controlled by the laser energy density. Utilizing this process, for which the maximum temperature is 350 °C, both high quality polycrystalline and amorphous silicon TFTs have been fabricated on the same Corning 7059 glass substrate.