M. Hrycyk

The layer 0 inner silicon detector of the D0 experiment

This paper describes the design, fabrication, installation and performance of the new inner layer called Layer 0 (L0) that was inserted in the existing Run IIa Silicon Micro-Strip Tracker (SMT) of the D0 experiment at the Fermilab Tevatron {bar p}p collider. L0 provides tracking information from two layers of sensors, which are mounted with center lines at a radial distance of 16.1 mm and 17.6 mm respectively from the beam axis. The sensors and readout electronics are mounted on a specially designed and fabricated carbon fiber structure that includes cooling for sensor and readout electronics. The structure has a thin polyimide circuit bonded to it so that the circuit couples electrically to the carbon fiber allowing the support structure to be used both for detector grounding and a low impedance connection between the remotely mounted hybrids and the sensors.

THE SILICON VERTEX DETECTOR OF THE COLLIDER DETECTOR AT FERMILAB

Abstract A silicon microstrip vertex detector has been constructed and installed in the Collider Detector at Fermilab. The device has been designed to operate at a hadron collider. It began collecting data in May of 1992 and has functioned within specification. Technical details are presented on all aspects of the system and its performance.

Intermediate silicon layers detector for the CDF experiment

Abstract The Intermediate Silicon Layers (ISL) detector is currently being built as part of the CDF II detector upgrade project. The ISL detector will significantly improve tracking in the central region and, together with the Silicon Vertex detector, provide stand-alone 3D track information in the forward/backward regions. In this article, we present the quality of the production sensors manufactured by Hamamatsu Photonics, which account for roughly half of the silicon sensors used in the ISL detector.

Design and Construction of the CDF Central Tracking Chamber

Abstract We describe the design and construction of a large drift chamber of a novel design well adapted for operation in high magnetic fields and in the high track density environment of hadron colliders.

THE CDF SILICON VERTEX DETECTOR

A silicon strip vertex detector was designed, constructed and commissioned at the CDF experiment at the Tevatron collider at Fermilab. The mechanical design of the detector, its cooling and monitoring are presented. The front end electronics employing a custom VLSI chip, the readout electronics and various components of the SVX system are described. The system performance and the experience with the operation of the detector in the radiation environment are discussed. The device has been taking colliding beams data since May of 1992, performing at its best design specifications and enhancing the physics program of CDF.

PROGRESS IN THE CONSTRUCTION OF THE CDF SILICON VERTEX DETECTOR

Abstract The mechanical design and construction progress of the CDF silicon vertex detector is described. Results on the location accuracy of the silicon strip detectors are presented and indicate an initial placement uncertainty of less than 10 μm. The water and gas cooling system, which is constructed of low mass materials and is used to remove heat from the readout electronics, is briefly described. Measurements of the performance of the silicon strip detectors are also given and show > 98.5% functioning strips for the assembled SVX detector.

The CDF silicon vertex detector: an overview and test results

The final design and construction of a 46080 channel silicon microstrip vertex detector (SVX) for the Collider Detector Facility (CDF) experiment at the Tevatron collider are described. The system performance of the front end electronics employing a custom VLSI readout chip and the mechanical support and cooling systems for the 0.7 m/sup 2/ silicon detector are discussed. The authors present performance results from initial testing of individual components through final testing of the full system of detectors, readout, cooling, and data acquisition. Preliminary results from cosmic ray triggered data are also described.<<ETX>>

CDF run IIb silicon detector: the innermost layer

The innermost layer (L00) of the Run IIa silicon detector of CDF was planned to be replaced for the high luminosity Tevatron upgrade of Run IIb. This new silicon layer (L0) is designed to be a radiation tolerant replacement for the otherwise very similar L00 from Run IIa. The data are read out via long, fine-pitch, low-mass cables allowing the hybrids with the chips to sit at higher z(/spl sim/70 cm), outside of the tracking volume. The design and first results from the prototyping phase are presented. Special focus is placed on the amount and the structure of induced noise as well as signal-to-noise values.

Svx Test Beam Results

Abstract An SVX sector prototype was operated at Fermilab in a configuration very close to the version to be installed in CDF. The sparse readout features of the SVXD chip [1,2], which provide the local data compaction that is necessary to deal with the detector high number of channels (40K) and typical Tevatron luminosities, were tested for the first time with a 230 GeV/ c pion beam. A good background rejection and high hit efficiency was demonstrated in this mode of operation, with adequate signal to noise ratio and spatial resolution.

Construction of the CDF silicon vertex detector

Technical details and methods used in constructing the Collision Detector Facility (CDF) silicon vertex detector are presented. Attention is given to the foam-carbon fiber composite structure used to support the silicon microstrip detectors and the procedure for achievement of 5- mu m detector alignment. The construction of the beryllium barrel structure, which houses the detector assemblies, is also described. In addition, the 10- mu m placement accuracy of the detectors in the barrel structure is discussed, and the detector cooling and mounting systems are described. The construction of the CDF silicon vertex detector has been completed. The silicon strip detectors are located to an accuracy of 10 mu m and >98-5% of the silicon strips are fully functional.<<ETX>>