M.J. Baxter

Process control systems integration using object oriented technology

The development of a control software design environment, namely the Integrated Design Notation (IDN), is presented. IDN supports the design, development and implementation of decentralised distributed control systems. A cable extrusion process is targeted as a demonstrator application, where object-oriented technology is expected to facilitate the improvement of extruder control in a distributed environment. IDN is based on the Unified Modelling Language (UML). A CASE tool supporting UML is integrated with IDN. The translation to integrate a control software tool (Simulink) and options to generate automatic Java code are described.

Performance Evaluation Issues in Real-Time Parallel Signal Processing and Control

This paper presents an investigation into the performance evaluation issues involved in real-time parallel signal processing and control. Issues such as algorithm partitioning, mapping, interprocessor communication, granularity, regularity, compiler efficiency for numerical computation, and code optimization with several signal processing and control algorithms are investigated and presented. Several algorithms are considered and implemented on a number of uniprocessor and multiprocessor, homogeneous and heterogeneous, parallel architectures. A comparative performance evaluation of the architectures is made, demonstrating the critical problems encountered in real-time parallel signal processing and control.

Development framework approach to heterogeneous system design for control systems

Abstract An integrated environment of software development tools, known as the Development Framework, which automates the design process for complex real-time embedded control systems, is introduced. The approach favoured here is to maximise the use of commercially available tools that are well understood by current industrial practitioners. Where necessary, new tools are introduced both in unifying the automated method and for supporting specialist functions. Introduced here is one such specialist example: support for the design of heterogeneous systems. This paper details the work on heterogeneity, and demonstrates how the essential properties of the Development Framework have been preserved. Thus, the Framework presents a unified methodology and an open system architecture. Finally, what should be learnt from this for building future techniques and tools for complex real-time control systems is discussed.

HETEROGENEOUS ARCHITECTURES FOR REAL-TIME CONTROL: DESIGN TOOLS AND SCHEDULING ISSUES

Abstract Complex and computationally demanding algorithms are often employed to satisfy the performance requirements of modern control systems. Conventional uni-processor and homogeneous parallel architectures can not meet the performance requirements of these algorithms. A suitable solution maybe obtained with a computationally specialised heterogeneous architecture. This paper introduces the key issues associated with the development of this class of systems. followed by a description of a set of design tools used to automate the development. One of the most challenging aspects of the system development is the scheduling of tasks to processors. This paper will focus closely on this issue by discussing the results of a variety of scheduling heuristics used within the design tools.

Performance Evaluation of Homogeneous and Heterogeneous Architectures in Real-Time Signal Processing and Control

Abstract This paper presents an investigation into the real-time performance evaluation of parallel architectures in signal processing and control applications. Several complex and demanding signal processing and control algorithms with various computational requirements are considered to explore hardware and software resources and the capabilities of the architectures. The algorithms are implemented on a number of heterogeneous and homogeneous architectures incorporating high performance processors. Finally, a comparison of the results of implementations is made to establish merits of design and development of parallel architectures for real-time signal processing and control applications.

Mapping Real-time Control Algorithms onto Heterogeneous Architectures

Abstract Mapping is the off-line allocation of the tasks that represent a parallelised algorithm across a multiprocessor architecture. In this paper the target architecture is heterogeneous, where a number of computationaly disparate processors are integrated within a single network. This paper describes three mapping approaches that attempt to minimise the cycle time of several parallelised algorithms. The mapping algorithms have been embedded into a suite of design tools that allow a rapid translation from an application algorithm to a parallel implementation. These tools are used to explore the efficacy of the mapping algorithms. A simple heuristic is appraised first, followed by an examination of a genetic algorithm (GA) approach. Initially, the GA utilises a simple parallel architecture model. However, this leads to the embedding of the target hardware within the objective function to improve performance. Finally, the effectiveness of these approaches are examined and contrasted.

A generic approach to parallelizing and developing control algorithms for heterogeneous architectures

System developers have found that exploiting parallel architectures for control systems is challenging and often the resulting implementations do not provide the expected performance advantages over traditional uniprocessor solutions. This paper presents a generic method and a suite of design tools for the implementation of control algorithms on parallel architectures. These tools allow a developer to translate a control system algorithm into efficient executable code, via a highly automated route, for a class of advanced parallel architectures. The tools are demonstrated and discussed by developing several case-study algorithms to full implementations with an emphasis on the problematic areas leading to performance degradation common to parallel systems.