M. M. Ahmed

Temperature-dependent I-V characteristics of organic-inorganic heterojunction diodes

In this paper, heterojunctions were fabricated by employing p-type Si and thin films of poly-N-epoxipropylcarbazole (PEPC) doped with tetracyanoquinodimethane (TCNQ). The PEPC films were grown on Si wafers at room temperature but with different gravity (g) conditions:-1, 123, 277, and 1107g. Current-voltage (I-V) characteristics of the grown hybrid structures were evaluated as a function temperature (T) ranging from 20/spl deg/C to 60/spl deg/C. It was found that all samples are p-p isotype heterojunctions and the junctions fabricated at a high value of g, i.e., at 277 and 1107 g, showed reversible rectifying properties as a function of device temperature. Whereas the behavior of devices fabricated at 123 and 1 g were rectifying at room temperature, but became almost nonconductive after treating the samples at 60/spl deg/C. Rectification ratio, threshold voltage, reverse saturation current, and junction resistance of the fabricated junctions were evaluated at different temperatures. At T=60/spl deg/C, the devices grown at 1107 g exhibited rectification ratio less than unity which may be attributed to the switching of the depletion at the interface. This has been explained by assuming the generation of carriers are at elevated temperatures in the organic film, and their subsequent emission from the organic to the inorganic side of the heterojunction.

Effects of interface states on submicron GaAs metal–semiconductor field‐effect transistors assessed by gate leakage current

The effects of the interfacial oxide layer in Schottky barrier junctions on submicron GaAs metal–semiconductor field‐effect transistors (MESFETs) have been investigated. These effects include a shift in threshold voltage and compression in transconductance which can be explained by the current transport theory for the Schottky barrier with an interfacial layer. MESFETs were characterized by direct current measurements and oxide‐related degradation was evaluated by measuring the gate leakage current. It has been shown that a gate‐length dependent study of threshold voltage and transconductance is only possible if all the devices under consideration have identical Schottky responses. The current through a Schottky barrier appears to flow in a voltage‐dependent resistor and the voltage drop across this resistor cannot be neglected when the density of states at the metal–semiconductor interface becomes prominent because it will effectively increase the threshold voltage and reduce the device gain.

Effects of active-channel thickness on submicron GaAs metal semiconductor field-effect transistor characteristics

In small signal GaAs metal semiconductor field-effect transistor (MESFET) fabrication technology where a gate recess is required, the optimum value of residual channel thickness is one of the most crucial parameters for high transconductance operation of the device. The effects of active channel thickness on device characteristics have been investigated. In a different strategy to that of previously reported work, in this study we have fixed gate length Lg at 200 nm and varied the channel thickness, a from 100 to 40 nm. This means that the shape of the depletion layer, which is a function of gate length, was largely fixed for all the devices. The variation in the device characteristics depended on the change in the active channel thickness, which modifies the field distribution inside the channel. It was found that, for optimum doping concentration, the value of transconductance increases in a parabolic fashion by decreasing the aspect ratio (Lg/a) of the device, and a highest value of transconductance is...

Novel electron beam lithography technique for submicron T-gate fabrication

Submicron T gates have been fabricated using the high resolution electron beam lithography technique. The footprint of the T gate has been written in high molecular weight poly-methyl methacrylate (PMMA), whereas the top of the T gate is defined in AZ PF 514. A 400 nm thick layer of PMMA was first exposed and developed followed by the spinning of AZ PF 514. A wide line defining the top of the T gate was written in this resist which after development gave a T-shaped cross section. As both the bottom and the top of the T gate are dealt with independently, therefore, the technique provides a high degree of control and flexibility in the fabrication process. Moreover, the possibility of shorting of the top of the T gate with the Ohmic metallization is virtually impossible. Consequently, the process is a very good candidate for low-noise GaAs metal-semiconductor field-effect transistors (MESFETs) fabrication in which a narrow drain-to-source gap is required. GaAs MESFETs with T-shaped gates have been fabricated and characterized by dc measurements.

Transmission of RF signals through energy efficient window using FSS

Focusing on the radio frequency (RF) transmission through energy saving window, this paper presents the transmission characteristics of a dual-bandpass frequency selective surface (FSS) for GSM 900 MHz and 1800 MHz frequency bands used in GSM system. Through simulation, better transmission and less heat loss has been analyzed and investigated in this paper. Better stability has been achieved for both perpendicular (TE) and parallel (TM) polarizations at 0° incident angle.

Pipelined implementation of fixed point square root in FPGA using modified non-restoring algorithm

Square root is one of the fundamental arithmetic operations in signal and image processing algorithms. This article presents a novel pipelined architecture to implement N-bits fixed point square root in FPGA using non-restoring algorithm. Pipelining hazards were avoided by modifying the non-restoring algorithm resulting in a 30% improved latency time. Furthermore, the proposed architecture is flexible and can be modified as per the need of an application. The performance of the proposed system, as a function of execution time and power consumption per operation, has been compared with other floating point pipelined implementations. It is demonstrated that the proposed system is ∼ 2 times efficient compared to its counterparts.

A tri-band H-shaped microstrip patch antenna for DCS and WLAN applications

In this paper, a tri-band H-shaped microstrip patch antenna is presented for DCS and WLAN (IEEE 802.11a/b/g) applications. The proposed antenna has symmetrical properties and has been designed by etching H-shape structure on FR-4 substrate with coaxially fed input. It radiates for DCS (1.79-1.81 GHz) and WLAN (2.43-2.47 GHz, 5.11-5.27 GHz) frequency bands. It is demonstrated that the fabricated antenna offers improved values of S11 and VSWR. The noted gain at 1.8 GHz, 2.45 GHz and 5.2 GHz are 1.6 dBi, 1.9 dBi and 2.1 dBi, respectively. The return loss S11 of the fabricated antenna was simulated using Ansoft HFSS which was in good agreement with experimental data.

A novel FPGA compliant micropipeline

In this paper, it has been demonstrated that the concept of micropipeline which is native to full custom design can be imported to a traditionally synchronous environment of field-programmable gate arrays (FPGAs) by introducing delay pads which are implemented with a special technology-independent circuit called single-inverter ring oscillator. The delay pad can be customized with the help of a dividing counter to suit the requirements of various stages of the micropipeline. To implement FPGA compliant micropipeline unbundled data strategy has been adopted by incorporating special event controlled registers as opposed to traditional bundled data approach of micropipeline. A 5-stage reconfigurable micropipeline based load-store machine has been developed to demonstrate the validity of the proposed idea. Furthermore, it has been shown that a particular micropipeline stage functioning at its own pace goes into the sleep mode whenever the following stage is not ready to accept the data hence reducing the overall power consumption of the system.

Novel Pipelined Architecture for Efficient Evaluation of the Square Root Using a Modified Non-Restoring Algorithm

The square root is a basic arithmetic operation in image and signal processing. We present a novel pipelined architecture to implement N-bit fixed-point square root operation on an FPGA using a non-restoring pipelined algorithm that does not require floating-point hardware. Pipelining hazards in its hardware realization are avoided by modifying the classic non-restoring algorithm, thus resulting in a 13% improved latency. Furthermore, the proposed architecture is flexible allowing modification as per individual application needs. It is demonstrated that the proposed architecture is approximately four times faster than its popular counterparts and at the same time it consumes 50% less energy for envelope detection at 268xa0MHz sampling rate.

Design and Implementation of a Face Recognition System Using Fast PCA

High speed security and defense applications demand a quick decision for face recognition which requires a computationally time-efficient algorithm. These algorithms are primarily used to generate egien values. The generation of eigen values by employing decomposition method normally provides solution in O(n3) time whereas an orthogonalizational process, called fast principal component analysis (PCA) provides the same in O(n2) time. However, because of an orthonormalization convergence condition of Grams-Schmidt (GS) iterative process, fast PCA could result in non-deterministic state, especially for high resolution images. This could be associated with orthogonal vector space in GS, which causes nonconvergence of eigen solution under limited iteration. A modification has been proposed in fast PCA to generate eigen values for images including those at high resolution. By using these generated eigen values, an algorithm has been developed to optimize the error rate in face recognition systems under varying dimensionalities. The developed technique which provides deterministic, time efficient and low error rate solution could be a useful tool for high speed image recognition systems.