M. M. Dabrowski

Development of the data acquisition system for the Triple-GEM detectors for the upgrade of the CMS forward muon spectrometer

In this contribution we will report on the progress of the design of the readout and data acquisition system being developed for triple-GEM detectors which will be installed in the forward region (1.5 < |?| < 2.2) of the CMS muon spectrometer during the 2nd long shutdown of the LHC, expected in the period 2017?2018. The system will be designed to take full advantage of current generic developments introduced for the LHC upgrades. The current design is based on the use of CERN GLIB boards hosted in micro-TCA crates for the off-detector electronics and the Versatile Link with the GBT chipset to link the front-end electronics to the GLIB boards. In this contribution we will describe the physics goals, the hardware architectures and report on the expected performance of the CMS GEM readout system, including preliminary timing resolution simulations.

The VFAT3-Comm-Port: A complete communication port for front-end ASICs intended for use within the high luminosity radiation environments of the LHC

This paper presents the VFAT3 Comm-Port (V3CP), which offers a single port for all communication to and from a front-end ASIC within the HL-LHC environment. This includes synchronization to the LHC clock, slow control communication, the execution of fast control commands and the readout of data.

Development of a GEM Electronic Board (GEB) for triple-GEM detectors

Developed for use with triple GEM detectors, the GEM Electronic Board (GEB) forms a crucial part of the electronics readout system being developed as part of the CMS muon upgrade program. The objective of the GEB is threefold; to provide stable powering and ground for the VFAT3 front ends, to enable high-speed communication between 24 VFAT3 front ends and an optohybrid, and to shield the GEM detector from electromagnetic interference. The paper describes the concept and design of a large-size GEB in detail, highlighting the challenges in terms of design and feasibility of this deceptively difficult system component.

Calibration, bias and monitoring system for the VFAT3 ASIC of the CMS GEM detector

VFAT3 is the last version of a family of multichannel trigger and tracking ASICs designed for the upgrade of the CMS experiment in the LHC. The chip has been developed to provide fast trigger information from the readout of gas particle detectors improving the resolution of the time measurement. The VFAT3 architecture comprises 128 analog channels, each one composed by a low noise and low power charge sensitive amplifier, shaper and constant fraction discriminator. The comparator output is synchronized with the LHC clock and sent both to a fixed latency path for trigger signal generation and to a variable latency path for storage and readout. The front-end amplifier is programmable in terms of gain and pulse shaping time, in order to adapt it to a wide range of gaseous detectors as well as silicon detectors. The chip also comprises a programmable calibration system that can provide both voltage and current pulses. There are also two internal 10 bit ADCs for the monitoring of the internal bias references. The digital logic provides trigger generation, digital data tagging and storage, data formatting and data packet transmission with error protection on 320Mbps e-link. The digital design is triplicated in order to improve the radiation hardness of the system. A first run of the chip of 9.1×6.1mm2 in 130nm technology node has been submitted and produced. Chip architecture, measurements and characterization of the calibration, bias and monitoring system will be shown.