M. Raymond

A novel technique for fast pulse-shaping using a slow amplifier at LHC

Abstract We describe a new technique for front end signal processing for LHC type applications, where a shaping amplifier with a time constant of several beam crossing intervals is used. The method is based on discrete time filtering of data extracted from an analog pipeline after a first level trigger. A finite impulse response type filter deconvolutes the sampled voltages of the shaped pulse to retrieve the original impulse signal with high precision. Measurements showing the performance of the technique and its implication for signal to noise are presented. The method is well matched to CMOS front ends, where low power consumption and low noise is achieved for silicon strip readout by utilizing pulse shapes with time constants ∼ 50 ns. A CMOS circuit emulating the filter has been built. It has been implemented with very low power consumption (

The APV25 0.25 /spl mu/m CMOS readout chip for the CMS tracker

The APV25 is a chip designed for readout of silicon microstrips in the CMS tracker at the CERN Large Hadron Collider. It is the first major chip for a high energy physics experiment to exploit a modern commercial 0.25 /spl mu/m CMOS technology. Experimental characterisation of the circuit shows excellent performance before and after irradiation. Automated probe testing of many chips has demonstrated a very high yield. A summary of the design, detailed results from measurements, and probe testing results are presented.

The T2K Side Muon Range Detector (SMRD)

The T2K experiment is a long baseline neutrino oscillation experiment aiming to observe the appearance ofe in a �µ beam. The �µ beam is produced at the Japan Proton Accelerator Research Complex (J-PARC), observed with the 295 km distant Super- Kamiokande Detector and monitored by a suite of near detectors at 280m from the proton target. The near detectors include a magnetized off-axis detector (ND280) which measures the un-oscillated neutrino flux and neutrino cross sections. The present paper describes the outermost component of ND280 which is a side muon range detector (SMRD) composed of scintillation counters with embedded wavelength shifting fibers and Multi-Pixel Photon Counter read-out. The components, performance and response of the SMRD are presented.

Design and performance of a high rate, high angular resolution beam telescope used for crystal channeling studies

A charged particle telescope has been constructed for data taking at high rates in a CERN 400 GeV/c proton beam line. It utilises ten planes of silicon microstrip sensors, arranged as five pairs each measuring two orthogonal coordinates, with an active area of 3.8 × 3.8 cm2. The objective was to provide excellent angular and spatial resolution for measuring the trajectories of incident and outgoing particles. The apparatus has a long baseline, of approximately 10 m in each arm, and achieves an angular resolution in the incoming arm of 2.8 μrad and a total angular resolution on the difference of the two arms of 5.2 μrad, with performance limited by multiple scattering in the sensor layers. The sensors are instrumented by a system based on the CMS Tracker electronic readout chain, including analogue signal readout for optimal spatial resolution. The system profits from modified CMS software and hardware to provide a data acquisition capable of peak trigger rates of at least 7 kHz. We describe the sensor readout, electronic hardware and software, together with the measured performance of the telescope during studies of crystal channeling for the UA9 collaboration. Measurements of a previously unobserved periodic movement of the beam are also presented and the significance of such an effect for precise studies such as for channeling is discussed.

The CMS binary chip for microstrip tracker readout at the SLHC

A 130 nm CMOS chip has been designed for silicon microstrip readout at the SLHC. The CBC has 128 channels, and utilises a binary un-sparsified architecture for chip and system simplicity. It is designed to read out signals of either polarity from short strips (capacitances up to ~ 10 pF) and can sink or source sensor leakage currents up to 1 μA. Details of the design and measured performance are presented.

Measurements of transistors and silicon microstrip detector readout circuits in the Harris AVLSIRA rad-hard CMOS process

Abstract The RD20 collaboration has been developing silicon detectors and front end electronics for inner tracking applications at the proposed Large Hadron Collider (LHC) accelerator at CERN. Prototype amplifier circuits and test structures have been designed and fabricated in a radiation hard bulk CMOS technology (Harris AVLSIRA). Results from measurements of individual transistors and circuits from the first fabrication run in this process are presented, before and after irradiation. The noise performance of the prototype amplifiers is compared with predictions from the transistor noise spectrum measurements, and the optimised performance is predicted.

Design of a small laboratory Compton camera for the imaging of positron emitters

A small laboratory prototype has been designed for the Compton imaging of annihilation photons produced from positron emitters. Considerations on the design of the scatter collimator are presented and the system configuration is described. The system features a stack of four AC coupled, double-sided silicon strip detectors (6/spl times/6 cm/sup 2/ area, 500 /spl mu/m thickness, 470 /spl mu/m strip pitch, 128 channels/side) in a double Compton configuration and externally triggered readout mode. Signal readout is obtained by bonding two 128-channel low-noise APV6 chips to each detector. Custom electronics have been developed for the chip readout. The system is currently being assembled. The estimated angular resolution of the camera is approximately 4 degrees. High sensitivity could be achieved by extending the number of stack elements and by improving the design of the trigger detector, which presently consists of a small area germanium crystal.

Hybrid circuit prototypes for the CMS Tracker upgrade front-end electronics

New high-density interconnect hybrid circuits are under development for the CMS tracker modules at the HL-LHC. These hybrids will provide module connectivity between flip-chip front-end ASICs, strip sensors and a service board for the data transmission and powering. Rigid organic-based substrate prototypes and also a flexible hybrid design have been built, containing up to eight front-end flip chip ASICs. A description of the function of the hybrid circuit in the tracker, the first prototype designs, results of some electrical and mechanical properties from the prototypes, and examples of the integration of the hybrids into detector modules are presented.

The CBC microstrip readout chip for CMS at the High Luminosity LHC

The CMS Binary Chip (CBC) is designed for readout of silicon microstrips in the CMS Tracker at the High Luminosity LHC (HL-LHC). Binary, unsparsified readout is well suited to the high luminosity environment, where particle fluences and data rates will be much higher than at the LHC. In September 2011, a module comprising a CBC bonded to a silicon microstrip sensor was tested with 400 GeV protons in the H8 beamline at CERN. Performance was in agreement with expectations. The spatial resolution of the sensor and CBC has been shown to be better than pitch/ p 12 due to spatial distribution of one and two strip clusters. Large cluster events show consistency with the production of delta rays. At operating thresholds, the hit efficiency has been shown to be approximately 98%, limited by the resolution of timing apparatus, while the noise occupancy is measured to be below 10 4 . The distribution of charge deposition in the sensor has been reconstructed by measurement of the hit efficiency as a function of comparator threshold; assuming the underlying distribution is a Landau.

Radiation hard electronics for LHC

Abstract A CMOS front end electronics chain is being developed by the RD20 collaboration for microstrip detector readout at LHC. It is based on a preamplifier and CR-RC filter, analogue pipeline and an analogue signal processor. Amplifiers and transistor test structures have been constructed and evaluated in detail using a Harris 1.2 μm radiation hardened CMOS process. Progress with larger scale elements, including 32 channel front end chips, is described. A radiation hard 128 channel chip, with a 40 MHz analogue multiplexer, is to be submitted for fabrication in July 1994 which will form the basis of the readout of the tracking system of the CMS experiment.