M. Ueno

A systematic design formulation for Butler matrix applied FFT algorithm

A systematic general design formulation for a Butler matrix ( B matrix) is described. The B matrix design problem discussed is used to determine phase shift location and value in a matrix, when the number of beam (elements of array) M = 2^{N} and the scattering matrix for the hybrid couplers are specified. The design formulation presented is based on the fact that a B matrix design procedure and an FFT algorithm are equivalent in fundamental concepts. It is shown that the B matrix design procedure can be systematically formulated by the FFT algorithm modifications, which preserves the topological properties of the original signal flow diagram. A simple design formula has been established by this formulation.

Scanning limitation in adaptive superresolution array

A fundamental limitation in an adaptive superresolution array, due to reciprocity between the angular resolution capability and the measurement time required, is discussed. For this purpose, a new concept for the measurement time, a scanning time concept, is introduced by considering a superresolution array consisting of an Applebaum-Howells adaptive processor with steering signal changing periodically with time. The measurement time is defined as the amount of time taken to perform one observation over the range of desired angle. Superresolution array output is defined according to the adapted angular response formulation. It is shown that the relationship between the resolution capability and the scanning time is reciprocal, i.e., the increased angular resolution is obtained at the expense of the scanning time. The relationship is discussed quantitatively for a narrow-band signal model.

A systolic array architecture for the Applebaum-Howells array

A systolic array architecture for the Applebaum-Howells array is derived. The problem to be solved is the elimination of the global signal feedback loop in the conventional Applebaum-Howells array processor. The procedure involved in deriving the architecture consists of two steps: orthogonalization of the input element signals and elimination of the feedback loop. In the first step, the input element signals are orthogonalized with regard to each other by using the Gram-Schmidt processor, placed ahead of the Applebaum-Howells processor. It is shown in the second step that the orthogonality in the Gram-Schmidt processor output signals can remove the global signal feedback loop and that the Applebaum-Howells array can be implemented effectively by using a systolic array with regular structure and local communication. Simulation results also show that the proposed processor features desirable characteristics for the radiation pattern with low sidelobe level common to the Applebaum-Howells array. >

Lyapunov stability of adaptive LMS array

The adaptive least mean square (LMS) array, particularly an array using reference signal reproduction processor (RSRP), is analyzed based on investigations of Lyapunov stability properties for the array weighting. The operation of the array utilizing RSRP is formulated as a Volterra integrodifferential equation. It is assumed as an essential condition that zero input to RSRP implies zero output. This condition makes the equation homogeneous and leads to an important result that the trivial solution for the equation has the Lyapunov asymptotic stability. Namely, the weighting for the array with RSRP might be drived to zero asymptotically. The servomechanism viewpoint also provides an intuitive understanding for the result.

Clutter Covariance Matrix Form Effect on Adaptive MTI Performance

The performance of an adaptive moving target indicator (MTI), which employs a Wiener predictor by means of a transversal filter, is discussed, taking into consideration the effect of the form of the clutter covariance matrix on the MTI performance. It is emphasized that the main tap position in the transversal filter is an important factor which provides degrees of freedom in the clutter covariance matrix to improve the MTI performance. Calculation results show that by exploiting these degrees of freedom, excellent performance is feasible, in particular shorter transient response.

Systolic array architecture of Applebaum-Howells array

A systolic array architecture for the Applebaum-Howells array is presented. The proposed architecture uses the preprocessor technique; the overall array consists of a preprocessor and an Applebaum-Howells processor. Assuming that the Gram-Schmidt processor is used as the preprocessor, it is shown that the orthogonality among the Gram-Schmidt processor outputs can remove the global feedback loop needed in the conventional Applebaum-Howells processor, which prevents the array from being used in systolic array implementation, and that the Applebaum-Howells array can be efficiently implemented by using the systolic array architecture.<<ETX>>