Maaspaliza Azri

Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA

This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the 3 rd , 5 th , 7 th , 9 th and 11 th order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

A Highly Efficient Single-phase Transformerless H-bridge Inverter for Reducing Leakage Ground Current in Photovoltaic Grid-connected System

Abstract In this article, the performance of the split-capacitor H-bridge topology as a single-phase transformerless photovoltaic inverter is studied. By connecting the midpoint of its two series DC-link capacitors to the ground, the split-capacitor H-bridge is able to clamp the common-mode voltage of the system, effectively suppressing leakage ground current. To overcome the issue of capacitor voltage balancing, a simple balancing circuit and its control are introduced. The operation modes, common-mode voltage, and leakage ground current characteristics of the split-capacitor H-bridge topology are discussed, subsequently validated using both simulation and experimental tests. Comparison with a conventional transformerless H-bridge topology proves the superiority of the split-capacitor H-bridge topology in terms of leakage ground current and efficiency.

Design analysis of low-pass passive filter in single-phase grid-connected transformerless inverter

Presented is the design analysis of a single-phase grid-connected photovoltaic-inverter low-pass-output filter. It minimizes switching-frequency current harmonics, improving output response. The inverter is H-Bridge transformerless. Switching frequencies 8Hz, 14kHz, and 20kHz were compared for validation of the simulation and the experiment.

Generalized selective harmonic elimination modulation for transistor-clamped H-bridge multilevel inverter

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

Analysis performance of proton exchange membrane fuel cell (PEMFC)

Recently, the proton exchange membrane fuel cell (PEMFC) has gained much attention to the technology of renewable energy due to its mechanically ideal and zero emission power source. PEMFC performance reflects from the surroundings such as temperature and pressure. This paper presents an analysis of the performance of the PEMFC by developing the mathematical thermodynamic modelling using Matlab/Simulink. Apart from that, the differential equation of the thermodynamic model of the PEMFC is used to explain the contribution of heat to the performance of the output voltage of the PEMFC. On the other hand, the partial pressure equation of the hydrogen is included in the PEMFC mathematical modeling to study the PEMFC voltage behaviour related to the input variable input hydrogen pressure. The efficiency of the model is 33.8% which calculated by applying the energy conversion device equations on the thermal efficiency. PEMFCs voltage output performance is increased by increasing the hydrogen input pressure and temperature.

Hardware in the Loop (HIL) simulation of Multi Device Interleaved Boost Converter (MDIBC)

This paper presents a Hardware in the Loop (HIL) simulation technique for Multi Device Interleaved Boost Converter. The main advantage of this technique is to make sure the converter could operate in right way, even if the real time experimental set-up is not completely available. After a successful HIL simulation, it would be easy to continue or implement the system in real hardware. This paper presents the process of designing the MDIBC by using MATLAB/Simulink software which can simulate and interface with DSP tool kit. The MDIBC is chosen because of its advantages of reducing the passive components size, as well as reduction in input ripple current which could lead to non-linear source (fuel cell) damages. This converter also has been compared with a conventional boost converter (BC) to validate the efficiency.

A modified PID controller of SEPIC converter for excellent dynamic performance

Single-ended primary inductor converter (SEPIC) is widely used in battery charging of renewable energy and electric/hybrid vehicles due to its output gains range flexibility, less complex switching design, providing an isolation by using series capacitor and producing non-inverted output. This paper presents a modified PID controller to obtain excellent dynamic performance with zero steady-state error. The controller design is discussed and built in discrete model simulation on Matlab-Simulink. The effectiveness of the proposed modified PID control strategy is tested for the transient cases in step-changed load, step-changed reference voltage, and varying input voltages. The results show the proposed controller can compensate overshoot percentage (%OS), reach zero steady-state error and produce lower ripple in voltage.