Manuel J. Lopez-Sanchez

Implementation of a

Repetitive schemes represent an attractive solution for harmonic compensation, as they are easy to implement and require a reduced computational effort. Repetitive schemes involve the interconnection of delay lines usually implemented in digital form. A delay line is realized digitally by reserving a given number of memory localities, where samples are allocated and released after a specific number of sampling periods (discrete delay) equivalent to the delay time. Such a discrete delay computed as the ratio between the required delay time and the sampling period must be an integer number in the best scenario. However, the discrete delay may have a fractional part due to limitations on the sampling period or the required delay time. This issue is referred in signal processing literature as fractional delay (FD). This paper presents a solution to implement repetitive schemes subject to such an FD issue. The solution consists in the introduction, on each delay line, of an additional filter aimed to compensate such an FD. In particular, this paper focuses on a repetitive scheme that is able to compensate harmonics 6n ±1. Experimental results are presented to confirm the benefits of the proposed scheme.

6n \pm 1

This paper presents a phase-locked loop (PLL) method aimed to provide an estimation of the phase angle and the amplitude of the fundamental positive sequence component of a three-phase reference signal subject to severe unbalance and high harmonic distortion. In addition the proposed scheme provides the estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of the reference signal. The proposed method is referred as CSRF-PLL and consists of a cascade interconnection of two recently reported PLL schemes, namely, UH-PLL reported in [1] and the conventional SRF-PLL reported in [2]. In the CSRF-PLL, the UH-PLL is used as a pre-filter to extract the positive-sequence component of the reference signal which is fed to the SRF-PLL. Recall that the proper operation of the SRF-PLL can only be guaranteed if its input is a pure sinusoidal and balanced signal, which in this case is represented by the fundamental positive sequence delivered by the UH-PLL. The SRF-PLL is used, in its turn, to estimate the fundamental frequency which is necessary for the proper operation of the UH-PLL. Simulations are provided to evaluate the performance of the proposed solution. Experimental evidence will be provided in the final version of the paper.

Repetitive Controller Subject to Fractional Delays

Repetitive schemes, aimed for harmonic compensation, are formed by the interconnection of delay lines. They are usually implemented in a digital way, where delay lines are replaced by discrete delays. Each discrete delay is obtained as the ratio between the required delay time in continuous time and the sampling period. A problem arises whenever the delay time of the controller is not an integer multiple of the sampling period. This is referred to in the literature as the fractional delay issue. In repetitive schemes, the delay time is a function of the fundamental frequency of the signals under study. Applications where the fundamental frequency varies with time entails variations in the delay time and, in particular, in its fractional part. This issue is referred to as variable fractional delay (VFD). This work presents a simple solution to implement repetitive schemes subject to a VFD issue. The introduction of an additional filter structure, called the Farrow structure, to each delay line is proposed. Theoretical analysis and design guidelines for the Farrow-structure-based repetitive scheme are provided. In particular, this paper focuses on the 6k ± 1 repetitive scheme. Experimental results are presented to confirm the benefits of the proposed solution.

Cascade three-phase PLL for unbalance and harmonic distortion operation (CSRF-PLL)

The main objective of this paper is to present a comparison between two models for estimation of a photovoltaic system’s module temperature (T\(_{mod}\)) using Artificial Neural Networks and Adaptive Neuro Fuzzy Inference Systems. Both estimations use measurements of common operation variables: current, voltage and duty cycle (d) from a power converter of the photovoltaic system as input variables and T\(_{mod}\) as a desired output. The models used the same database for the training process, different training strategies were evaluated with the objective to find which model has the best estimation with respect to the T\(_{mod}\). Subsequently, the output results from these architectures are validated via the Root Mean Squared Error, Mean Absolute Percentage Error and correlation coefficient. Results show that the Artificial Neural Network model in comparison with Adaptive Neuro Fuzzy Inference System model provides a better estimation of T\(_{mod}\) with \(R = 0.8167\). Developed models may have an application with smart sensors on cooling systems for photovoltaic modules with the objective of improving their operation efficiency.

Compensation of Variable Fractional Delays in the

This paper presents a scheme combining two controllers for a buck-based PV simulator. These two controllers are referred as current mode controller and voltage mode controller. The idea of using two controllers is based on the observation that one controller shows a good performance only in a segment of the iv-characteristic curve where the other controller cannot perform well, and thus, both controllers can be activated in a complementary way. A definition of a new variable is introduced, which provides information on the location of the operation point. This information is used by the proposed strategy to enable the most appropriate control mode. Although each controller is designed following different approaches, both are based on a model representation of the system. Numerical results are presented considering a resistor as the load, which is varied in such a way that the iv-characteristic is swept up and down.

6k\pm 1

This paper presents a current controller for a transformerless single-phase two-level inverter grid connected by means of an LCL output filter and subject to a sever harmonic distortion in the grid voltage signal. The controller indirectly controls the grid-side current by controlling the inverter-side current. The inverter-side current controller is simpler to implement, moreover, it is shown that a damping injection can be done by a simple proportional action of the measured current. Instrumental for the proposed scheme is the proper design of the inverter-side current reference, which must guarantee that the grid-side current reaches its corresponding reference, i.e., a pure sinusoidal signal with the appropriate phase-shift. It is shown that the inverter-side current has to be distorted as much as necessary to guarantee that the grid-side current reaches its reference. The controller includes a harmonic compensation mechanism, therefore, it is aimed to properly perform under harmonic distortion operation. Numerical tests are presented to assess the performance of the proposed scheme. Experiments are under development and will be presented in the final version of the paper.

Repetitive Controller

This paper presents a transformerless single-phase inverter topology based on a modified H-bridge-based multilevel converter. The topology comprises two legs, namely, a usual two-level leg and a T-type leg. The latter is based on a usual two-level leg, which has been modified to gain access to the midpoint of the split dc-link by means of a bidirectional switch. The topology is referred as an asymmetrical T-type five-level (5L-T-AHB) inverter. An ad hoc modulation strategy based on sinusoidal pulsewidth modulation is also presented to control the 5L-T-AHB inverter, where the two-level leg is commuted at fundamental frequency. Numerical and experimental results show that the proposed 5L-T-AHB inverter achieves high efficiency, exhibits reduced leakage currents, and complies with the transformerless norms and regulations, which makes it suitable for the transformerless PV inverters market.11This updated version includes experimental evidence, considerations for practical implementation, efficiency studies, visualization of semiconductor losses distribution, a deeper and corrected common mode analysis, and an improved notation among other modifications.

Photovoltaic Module Temperature Estimation: A Comparison Between Artificial Neural Networks and Adaptive Neuro Fuzzy Inference Systems Models

This paper presents the modelling and control of the three-phase grid-connected modular multilevel converter. Based on the obtained model, a combined controller is proposed with the aim to regulate and balance the total energy on each converter phase, minimize circulating currents, and inject a current in phase with the grid voltage. For this, the proposed controller builds a reference for each arm of the modular multilevel converter, which then can be used in a proper modulation scheme to obtain the switching sequence for each submodule of the converter. Numerical results are presented to validate the proposed control scheme.

A combined controller for a PV simulator

This paper presents a current controller for a transformerless three-phase two-level inverter grid connected by means of an LCL output filter. The proposed controller indirectly controls the grid-side current by controlling the inverter-side current. In this fairly simple controller, the damping injection is done by a simple proportional action of the measured inverter-side current, where the main issue is the design of the inverter-side current reference. It is shown that the inverter-side current has to be as distorted as necessary to guarantee a grid-side current of a pure balanced sinusoidal shape. The proposed controller considers positive and negative sequences of signals, and includes a harmonic compensation mechanism. Therefore, it is aimed to properly perform under unbalance and harmonic distortion. Simulations are presented to assess the performance of the proposed scheme.