Marc Avice

Electrical properties of Al2O3∕4H‐SiC structures grown by atomic layer chemical vapor deposition

Al2O3 films have been deposited on n-type and p-type 4H‐SiC by atomic layer chemical vapor deposition using trimethylaluminum as a precursor for aluminum and both H2O and O3 as an oxidant. After oxide deposition, annealing at different temperatures (800, 900, 1000°C) in argon atmosphere for different durations (1, 2, 3h) was performed. Bulk and interface properties of the oxide films were studied by capacitance-voltage, current-voltage, deep level transient spectroscopy, and thermally dielectric relaxation current (TDRC) measurements. The results reveal a decreasing flatband voltage with increasing annealing time, suggesting decrease of oxide charges and deep interface traps. After 3h annealing at 1000°C of the n-type samples, the flatband voltage is reduced to 6V compared to a value in excess of 40V for as-deposited samples. The TDRC measurements on annealed Al2O3∕SiC (n-type) capacitors showed substantially different spectra relative to conventional SiO2∕4H‐SiC control samples; in the former ones no sig...

Comparison of near-interface traps in Al2O3∕4H-SiC and Al2O3∕SiO2∕4H-SiC structures

Aluminum oxide (Al2O3) has been grown by atomic layer deposition on n-type 4H-SiC with and without a thin silicon dioxide (SiO2) intermediate layer. By means of capacitance-voltage and thermal dielectric relaxation current measurements, the interface properties have been investigated. Whereas for the samples with an interfacial SiO2 layer the highest near-interface trap density is found at 0.3eV below the conduction band edge Ec, the samples with only the Al2O3 dielectric exhibit a nearly trap-free region close to Ec. For the Al2O3∕SiC interface, the highest trap density appears between 0.4 and 0.6eV below Ec. The results indicate the possibility for SiC-based metal-oxide-semiconductor field-effect transistors with Al2O3 as the gate dielectric layer in future high performance devices.

Rearrangement of the oxide-semiconductor interface in annealed Al2O3∕4H-SiC structures

Al2O3 films with different thicknesses have been deposited on n-type (nitrogen-doped) 4H-SiC(0001) epitaxial samples by atomic layer chemical vapor deposition at 300°C and subsequently annealed in Ar atmosphere at temperatures up to 1000°C. The Al2O3∕4H-SiC structures were analyzed by x-ray photoelectron spectroscopy (XPS), secondary ion mass spectrometry (SIMS), and transmission electron microscopy (TEM). The XPS and SIMS results indicate that the average composition in the wider interface area does not significantly change due to the annealing. However, as revealed by the TEM investigations in combination with XPS, the as-grown samples exhibit a double interface created by an intermediate suboxide SiOx layer (x<2). After annealing, this intermediate suboxide layer breaks up and transforms into SiO2 islands, resulting in a rather rough interface region and a high concentration of pure Si in the Al2O3 film. Furthermore, a pronounced accumulation of H is found in the rough interface region and this may pla...

High Temperature Annealing Study of Al2O3 Deposited by ALCVD on n-Type 4H-SiC

Al2O3 has been grown by Atomic Layer Chemical Vapour Deposition (ALCVD) on ntype 4H-SiC using O3 as an oxidant. After post-deposition, annealing at high temperature (1000°C) in Argon atmosphere for different time periods (1h, 2h, 3h) was performed. Bulk and interface properties of the as-grown as well as the annealed films were studied by electrical measurements (CV, IV, DLTS) and Secondary Ion Mass Spectrometry (SIMS) measurements. The electrical measurements show a decreasing shift of the flatband voltage indicating a diminution of the negative oxide charges with increasing annealing time. After annealing at 1000°C for 3h, the flatband voltage shift has decreased to 6V. The SIMS measurements indicate a double interface with a SiOx (x ≤ 2) interlayer in the as-grown samples while only one interface is observed after annealing, leading to improved electrical behavior of the Metal-Oxide-Semiconductor devices.

Electrical Properties of Aluminium Oxide Films Grown by Atomic Layer Deposition on n-Type 4H-SiC

In this study, electrical properties of Al2O3 deposited by Atomic Layer Deposition (ALCVD) on n-type 4H-SiC were investigated. Metal-Oxide-Semiconductor (MOS) capacitors were characterized by various electrical techniques such as Capacitance-Voltage (CV), Current- Voltage (IV) and Deep Level Transient Spectroscopy (DLTS) measurements. Two different oxidants, H2O and O3, have been used for the oxide deposition. After deposition, the flat-band voltage shift is much less using O3 than H2O (~ 7V versus ~ 20V). Annealing treatment has been carried out at different temperatures in Ar atmosphere up to 700°C. Whereas the flat-band voltage shift can be reduced by annealing, the leakage current remains rather high.

Annealing study of H2O and O3 grown Al2O3 deposited by atomic layer chemical vapour deposition on n-type 4H-SiC

Al2O3 has been grown by atomic layer chemical vapour deposition on HF cleaned n-type 4H-SiC using either H2O or O3 as an oxidant. After post-deposition annealing at high temperature (1000°C) in argon atmosphere for different durations (1, 2 and 3 h), bulk and interface properties of the films were studied by capacitance–voltage (CV), current–voltage (IV) and secondary ion mass spectrometry (SIMS) measurements. Electrical measurements show a decreasing shift of the flatband voltage indicating a diminution of the negative oxide charges with increasing annealing time. The SIMS measurements reveal accumulation of boron, sodium and potassium at the Al2O3/SiC interface but the accumulation decreases with annealing at 1000°C where also out diffusion of silicon into the Al2O3 film takes place.

X-Ray and AFM Analysis of Al2O3 Deposited by ALCVD on n-Type 4H-SiC

Al2O3 grown by Atomic Layer Chemical Vapour Deposition (ALCVD) on n-type 4H-SiC with a nominal thickness of 100nm has been characterized by Grazing Incidence X-Ray Diffraction (GIXD) and Specular X-Ray Reflectivity (SXR) measurements. After post-deposition, the samples were annealed at different temperatures and durations in argon atmosphere. The GIXD results reveal crystallization at temperatures above 900°C, most likely in the form of θ-Al2O3 or γ-Al2O3. However, the formation of a new, non-stoichiometric Al2O3 phase cannot be excluded. The crystalline domain size, evaluated from the peak FWHMs after subtraction of the instrumental broadening, is found to be almost equal (18±1nm), independent of T in the range 900°C≤T≤1100°C and time in the range 1h≤t≤3h. From SXR, mass density profiles are derived. Whereas the as grown film exhibits the lowest mass density, at 800°C a low-density interface layer forms. At the same time, it appears that the initial crystallization starts at the surface. At 900°C, the density increases sharply (this process involves film crystallization) and the film thickness correspondingly reduces. Whereas the density increase and thickness reduction still continue for T>900°C (tendency to the density α-Al2O3), the density of the interfacial layer has a minimum at 900°C and gradually increases for higher temperatures. From Atomic Force Microscopy (AFM) investigations it could be revealed that the starting of the crystallization at 900°C is accompanied with a substantial surface roughening. For annealing at higher temperatures, the surface roughness is in the range of the one of the as-grown sample (about 6Å).

The Al2O3/4H-SiC Interface Investigated by Thermal Dielectric Relaxation Current Technique

Al2O3 has been grown by Atomic Layer Chemical Vapour Deposition (ALCVD) on ntype 4H-SiC using O3 as an oxidant and tri-methyl-aluminum (TMA) as a precursor. After deposition, annealing at 1000°C during 3h in different atmospheres (Ar, N2 and O2) was performed. Interface properties were studied by Capacitance-Voltage (CV) and Thermal Dielectric Relaxation Current (TDRC) measurements. The highest near-interface trap density (Nit) was deduced to be 4x1012 eV-1cm-2 between 0.36 eV and 0.5 eV below the conduction band, Ec, for O2 annealed samples, 2.8x1012 eV-1cm-2 between 0.42 eV and 0.56 eV below Ec for Ar annealed samples and 2.2x1012 eV-1cm-2 between 0.4 eV and 0.6 eV below Ec for N2 annealed samples. Only samples annealed in Ar exhibit a nearly trap free region close to Ec. Annealing in N2 is found to decrease Nit between 0.3 and 0.7 eV but shows a slightly higher Nit close the conduction band compared to the Ar case.

Influence of Annealing on the Al2O3/4H-SiC Interface

Summarizing, after a post-deposition annealing at 1000°C, correlation of XPS, SIMS and HRTEM data yields a scenario where the SiO x layer, occurring after ozone cleaning and Al 2 O 3 deposition, breaks up and transforms into islands of SiO 2 , which is thermodynamically very stable, at the interface. As a result, a rather rough interface region evolves and excess of pure Si appears in the Al 2 O 3 film. Moreover, a pronounced accumulation of H takes place in the rough interface region and this may at least partly be responsible for the low density of shallow electron states reported for annealed Al 2 O 3 /4H-SiC structures.