Marco Egbertus Theodorus Gerards

C?aSH: Structural Descriptions of Synchronous Hardware Using Haskell

CλaSH is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. Polymorphism and higher-order functions provide a level of abstraction and generality that allow a circuit designer to describe circuits in a more natural way than possible with the language elements found in the traditional hardware description languages. Circuit descriptions can be translated to synthesizable VHDL using the prototype CλaSH compiler. As the circuit descriptions, simulation code, and test input are also valid Haskell, complete simulations can be done by a Haskell compiler or interpreter, allowing high-speed simulation and analysis.

Optimal DPM and DVFS for frame-based real-time systems

Dynamic Power Management (DPM) and Dynamic Voltage and Frequency Scaling (DVFS) are popular techniques for reducing energy consumption. Algorithms for optimal DVFS exist, but optimal DPM and the optimal combination of DVFS and DPM are not yet solved. In this article we use well-established models of DPM and DVFS for frame-based systems. We show that it is not sufficient—as some authors argue—to consider only individual invocations of a task. We define a schedule that also takes interactions between invocations into account and prove—in a theoretical fashion—that this schedule is optimal.

Demand side management using profile steering

Many Demand Side Management (DSM) approaches use energy prices as steering signals. This paper shows that such steering signals may result in power quality problems and high losses. As an alternative, this paper proposes to use desired (e.g., flat) power profiles as steering signals and presents an efficient scheduling algorithm that can follow desired power profiles. This paper investigates the complexity of price and profile steering, and presents an algorithm for profile steering. The evaluation of this algorithm studies the results of a best possible uniform pricing and profile steering for a case of 121 houses, each with an electrical vehicle of which the power consumption can be controlled and shifted in time. In contrast to the other evaluated approaches, our profile steering algorithm results in a much flatter profile and keeps the voltage between 220V and 235V at each node. It reduces distribution losses by 57% compared to no control, and by 48% compared to uniform pricing.

On the interplay between global DVFS and scheduling tasks with precedence constraints

Many multicore processors are capable of decreasing the voltage and clock frequency to save energy at the cost of an increased delay. While a large part of the theory oriented literature focuses on local dynamic voltage and frequency scaling (local DVFS), where every cores voltage and clock frequency can be set separately, this article presents an in-depth theoretical study of the more commonly available global DVFS that makes such changes for the entire chip. This article shows how to choose the optimal clock frequencies that minimize the energy for global DVFS, and it discusses the relationship between scheduling and optimal global DVFS. Formulas are given to find this optimum under time constraints, including proofs thereof. The problem of simultaneously choosing clock frequencies and a schedule that together minimize the energy consumption is discussed, and based on this a scheduling criterion is derived that implicitly assigns frequencies and minimizes energy consumption. Furthermore, this article studies the effectivity of a large class of scheduling algorithms with regard to the derived criterion, and a bound on the maximal relative deviation is given. Simulations show that with our techniques an energy reduction of 30% can be achieved with respect to state-of-the-art research.

Streaming Reduction Circuit

Reduction circuits are used to reduce rows of floating point values to single values. Binary floating point operators often have deep pipelines, which may cause hazards when many consecutive rows have to be reduced. We present an algorithm by which any number of consecutive rows of arbitrary lengths can be reduced by a pipelined commutative and associative binary operator in an efficient manner. The algorithm is simple to implement, has a low latency, produces results in-order, and requires only small buffers. Besides, it uses only a single pipeline for the involved operation. The complexity of the algorithm depends on the depth of the pipeline, not on the length of the input rows. In this paper we discuss an implementation of this algorithm and we prove its correctness.

Analytic Clock Frequency Selection for Global DVFS

Computers can reduce their power consumption by decreasing their speed using Dynamic Voltage and Frequency Scaling (DVFS). A form of DVFS for multicore processors is global DVFS, where the voltage and clock frequency is shared among all processor cores. Because global DVFS is efficient and cheap to implement, it is used in modern multicore processors like the IBM Power 7, ARM Cortex A9 and NVIDIA Tegra 2. This theory oriented paper discusses energy optimal DVFS algorithms for such processors. There are no known provably optimal algorithms that minimize the energy consumption of nontrivial real-time applications on a global DVFS system. Such algorithms only exist for single core systems, or for simpler application models. While many DVFS algorithms focus on tasks, this theoretical study is conceptually different and focuses on the amount of parallelism. We provide a transformation from a multicore problem to a single core problem, by using the amount of parallelism of an application. Then existing single core algorithms can be used to find the optimal solution. Furthermore, we extend an existing single core algorithm such that it takes static power into account.

A survey of offline algorithms for energy minimization under deadline constraints

Modern computers allow software to adjust power management settings like speed and sleep modes to decrease the power consumption, possibly at the price of a decreased performance. The impact of these techniques mainly depends on the schedule of the tasks. In this article, a survey on underlying theoretical results on power management, as well as offline scheduling algorithms that aim at minimizing the energy consumption under real-time constraints, is given.

Higher-Order Abstraction in Hardware Descriptions with C?aSH

Synchronous hardware can be straight forwardly modelled as a function from input and (current) state to an updated state and output. The C?aSH compiler can translate such a transition function, described in a functional language, to synthesisable VHDL. Taking a hardware-oriented viewpoint, components can then be seen as an instantiation of such atransition function. An abstraction called Arrows is used to directly model components by combining a transition function and its state. The abstraction also provides an uniform interface for composition, without losing the referential transparency offered by a functional description. Furthermore, readability of hardware designs is increased by the use of the ?-syntax, that automatically composes components according to the Arrow interface. The advantages of the Arrow abstraction and the?-syntax are demonstrated by means of a realistic example circuit consisting of multiple components. This is a significant extension to C?aSH and enables many high level abstractions.

Resource allocation problems in decentralized energy management

Changes in our electricity supply chain are causing a paradigm shift from centralized control towards decentralized energy management. Within the framework of decentralized energy management, devices that offer flexibility in their load profile play an important role. These devices schedule their flexible load profile based on steering signals received from centralized controllers. The problem of finding optimal device schedules based on the received steering signals falls into the framework of resource allocation problems. We study an extension of the traditional problems studied within resource allocation and prove that a divide-and-conquer strategy gives an optimal solution for the considered extension. This leads to an efficient recursive algorithm, with quadratic complexity in the practically relevant case of quadratic objective functions. Furthermore, we study discrete variants of two problems common in decentralized energy management. We show that these problems are NP-hard and formulate natural relaxations of both considered discrete problems that we solve efficiently. Finally, we show that the solutions to the natural relaxations closely resemble solutions to the original, hard problems.

Assessing the potential of residential HVAC systems for demand-side management

This paper investigates the potential of residential heating, ventilation and air conditioning systems to contribute to dynamic demand-side management. Thermal models for seven houses in Austin, Texas are developed with the goal of using them in a planning based demand-side management methodology. The thermal models form the base to determine the flexibility present in these houses with respect to cooling requirements. The linear models are shown to be reasonably accurate when used to predict indoor temperature changes. Furthermore, the resulting prediction errors can be largely attributed to human behavior. The considered thermal models are integrated in a planning-based demand-side management methodology while accounting for such prediction errors. The resulting methodology is capable of flattening the load profile of the considered houses considerably.