Marco Portesine

Thermo-mechanical finite element analysis in press-packed IGBT design

Abstract The reliability of press-packed insulated gate bipolar transistors (IGBTs) depends on satisfactory contact conditions applied at assembly stage and maintained throughout the service life. The objective of this work is the simulation of stresses and strains in press-packed IGBTs due to assembly and thermal cycling. Single-chip as well as multi-chip devices were analyzed with 2D and 3D models including an elastic–plastic material description and the contact between components using the abaqus code. The assembly process was initially modeled and the factors affecting the contact pressure uniformity between contact disks and chip discussed. The thermal cycling associated with accelerated stress test was then introduced to examine contact pressure evolution as well as local stress/strain concentrations and stick/slip conditions. The device sensitivity to potential damage initiation due to thermo-mechanical fatigue and/or fretting is addressed.

Power cycling on press-pack IGBTs: measurements and thermomechanical simulation

Abstract Press-pack IGBTs are increasing their market-share, especially for traction applications. As packaging performance is a key factor for a successful product, there is a great interest in defining optimal solutions in terms of geometry, materials and mechanical loading. To support IGBT reliability assessment we developed a testing rig for accelerated testing of a single chip under controlled pressure conditions. In parallel, we created a thermomechanical simulation of the chip/testing rig assembly for the determination of internal stresses and strains due to actual operation. Test results and preliminary failure analysis following power cycling show the possibility of predicting the degradation according to different mechanisms induced by the combined effect of pressure and temperature fluctuation.

Thermo-mechanical simulation of a multichip press-packed IGBT

Abstract The reliability of press-packed integrated gate bipolar transistors (IGBT) depends on satisfactory contact conditions applied at assembly stage and mantained throughout the service life. The objective of this work is the simulation of the thermo-structural behavior of a multichip IGBT during initial assembly and subsequent uniform thermal cycling using the finite element method. A detailed axisymmetric FE model of the 3D-device is developed to assess multi-zone contact conditions. Elastic-plastic material behavior and Coulombian friction on contact surfaces are prescribed. The role of dimensional tolerances on contact conditions is discussed. The thermal cycling associated to accelerated testing is then introduced to determine the contact pressure evolution as well as local stick/slip conditions. The device sensitivity to potential damage initiation due to thermo-mechanical fatigue and/or fretting is addressed.

Experimental and numerical study of the recovery softness and overvoltage dependence on p–i–n diode design

Abstract This work offers a reliability-oriented characterization of power p–i–n diodes turn-off transients. The softness of the turn-off and the snap-off voltage (defined as the threshold beyond which large, anomalous reverse overvoltages develop across the diode at turn-off) are investigated both experimentally and numerically for a wide set of diodes with different drift region width, resistivity and lifetime. In particular, lifetime control is obtained by electron irradiation at different doses. As a result, guidelines emerge for the design of the snubberless diode with optimum trade-off between switching speed and softness. It is also suggested that, for complete diode characterization, the well-known softness factor be accompanied by the snap-off voltage, i.e. the peak reverse voltage triggering anomalous oscillations in the turn-off transient.

Coupled measurement-simulation procedure for very high power fast recovery – Soft behavior diode design and testing

Abstract Reliability requirements for very high power devices are growing for their importance in industrial drives and renewable energy; testing those devices in operating condition is more and more difficult. A coupled measurement-simulation based design procedure is presented and applied to high power PiN diodes for application with fast IGBTs or IGCTs, in which high di/dt’s can result in too high current or voltage or energy peaks during turn-off, limiting the reliability of the circuit. Appropriately tuned simulation of the semiconductor device embedded in the test circuit allows to overcome measurement capability limits and to properly design the diode itself and a specific test circuit.

A new silicon resistor technology for very high power snubbers

In this work we developed press-pack silicon resistors for current ratings of thousands of amperes. Many prototypes were fabricated (with various resistance values) and characterized, using low-voltage (< 100 V) fast-pulsed (i.e., isothermal) measurements to tune a two-dimensional electro-thermal numerical model. The simulations then provided us with a description of the resistor behavior under high-voltage and high-current conditions that were unattainable by our measurement set-up. The decrease of carrier mobility with electric field causes a non-linear I-V relationship whereby the resistance is lower at low fields and higher at high fields. This feature is useful in snubber applications, where the resistor is used as a current-limiting element during the discharge of the capacitor: the resistance is maximum at the onset of the discharge phase, when current must be limited, then its value decreases with the voltage drop, thus speeding up the transient. The simulations also allowed us to study the temperature dependence of the resistance. We observed a non-monotonic behavior, with an increase of the resistance with temperature due to carrier scattering, followed by a rapid decrease due to thermal generation of excess carriers. These press-packed resistors represent a promising solution for snubber application in stacks with high-power diodes or GTOs, very large currents being allowed by the outstanding heat-sinking capabilities of the press-pack

FE-Modeling and Physical Testing of IGBTs for Press-Packaging

The reliability of press-packed IGBTs strongly depends on the solutions adopted in terms of heat dissipation and thermo-mechanical stress management so as to guarantee satisfactory electrical and thermal contact conditions throughout the service life. In this paper, two aspects concerning the design process of a single-chip press-pack IGBT are outlined: i) cyclic stresses and strains occurring in the package and in the chip are discussed on the basis of finite element (FE) simulations, ii) a testing rig developed for accelerated testing of single IGBT chips under controlled contact pressure conditions is presented.

Thermo-Mechanical Simulation Of A Multichip Press-Packed Igbt

The reliability of press-packed integrated gate bipolar transistors (IGBT) depends on satisfactory contact conditions applied at assembly stage and mantained throughout the service life. The objective of this work is the simulation of the thermo-structural behavior of a multichip IGBT during initial assembly and subsequent uniform thermal cycling using the Finite Element method. A detailed axisymmetric FE model of the 3D-device is developed to assess multi-zone contact conditions. Elastic-plastic material behavior and Coulombian friction on contact surfaces are prescribed. The role of dimensional tolerances on contact conditions is discussed. The thermal cycling associated to accelerated testing is then introduced to determine the contact pressure evolution as well as local stick/slip conditions. The device sensitivity to potential damage initiation due to thermo-mechanical fatigue and/or fretting is addressed.