Mario Lopes Ferreira

Second life in-world action traffic modeling

Massive multiplayer online games (MMOGs) are increasingly popular because they can provide entertainment, numerous opportunities for socialization, and the ability for end users to earn money. Cornerstone to MMOGs is the underlying network traffic between MMOG clients and servers; understanding this traffic is important for application developers trying to improve game performance and for ISPs trying to provide a better quality of service for their customers. In this paper we present fine-grained approaches at modeling SL client-server traffic. Our approaches differ from existing modeling work as they focus on the analysis of specific in-world actions, on the decomposition of the collected samples in subsets of packets with the same size, and on modeling the dependencies between packets in the sample. We compare our different approaches between them and with the original collected sample using the Kolmogorov-Smirnov (KS) test statistic on packet size and inter-arrival time. We observed over one order of magnitude improvement of our models in the KS statistic for packet size and three time improvement for packet inter-arrival time compared to a bivariate 2-component Gaussian mixture model.

Reconfigurable FPGA-Based FFT Processor for Cognitive Radio Applications

Cognitive Radios CR are viewed as a solution for spectrum utilization and management in next generation wireless networks. In order to adapt themselves to the actual communications environment, CR devices require highly flexible baseband processing engines. One of the most relevant operations involved in radio baseband processing is the FFT. This work presents a reconfigurable FFT processor supporting FFT sizes and throughputs required by the most used wireless communication standards. By employing Dynamic Partial Reconfiguration DPR, the implemented design can adapt the FFT size at run-time and specialize its operation to the immediate communication demands. This translates to hardware savings, enhanced resource usage efficiency and possible power savings. The results obtained for reconfiguration times suggest that DPR techniques are a viable option for designing flexible and adaptable baseband processing components for CR devices.

Reconfigurable NC-OFDM Processor for 5G Communications

The proliferation of new wireless communication technologies and services led to a boost in the number of different available communication standards and spectrum usage. As the electromagnetic spectrum is a finite resource, concerns about its efficient management became an important aspect. Given this scenario, Cognitive Radio emerged as a solution for future wireless communication devices, by supporting multiple standards and improving spectrum utilization through opportunistic wireless access. The purpose of this research is to study and design a reconfigurable FPGA-based NC-OFDM baseband processor meeting the requirements of next generation Cognitive Radio devices in terms of multi-carrier, multi-standard communications and spectral agility in changing environments. The processor will be the core of a flexible NC-OFDM transceiver for future 5G communications with support for spectrum aggregation and runtime selection of modulation schemes and active sub-carriers. The goal is to achieve higher levels of system adaptability, upgradeability and efficiency, by employing dynamic partial reconfiguration of FPGAs.

Dynamically reconfigurable FFT processor for flexible OFDM baseband processing

The Physical layer architectures for the next generation of wireless devices will be characterized by a high degree of flexibility for real-time adaptation to communication conditions variability. OFDM-based architectures are strong candidates for the Physical layer implementation in 5G systems and one of the most important baseband processing operations required by this waveform is the Fast Fourier Transform (FFT). This paper proposes a dynamically reconfigurable FFT processor supporting FFT sizes and throughputs required by the most widely used wireless standards. The FFT reconfiguration was achieved by means of FPGA-based Dynamic Partial Reconfiguration (DPR) techniques, which enables run-time FFT size adaptation according to communication requirements and better resource utilization. The impact of DPR in terms of reconfiguration time and power consumption overhead was evaluated. The obtained results encourage the exploitation of DPR techniques to implement reconfigurable hardware infrastructures for OFDM baseband processing engines.

Dynamically reconfigurable LTE-compliant OFDM modulator for downlink transmission

As the number of wireless devices, services, communication standards and respective modes of operation rapidly grows, the design of reconfigurable digital baseband processing systems for radio devices becomes more important and challenging. Long Term Evolution (LTE) is among the most relevant wireless systems in 4G communications and its waveform is OFDM-based. According to the LTE mode of operation, OFDM parameters may change and influence baseband processing operations. This paper presents a dynamically reconfigurable LTE-compliant OFDM modulator for Downlink transmission able to adapt its internal hardware organization on-demand according to the digital modulation scheme and OFDM parameters, such as number of data subcarriers, IFFT size, Cyclic Prefix and window length. System reconfiguration is performed by employing FPGA-based Dynamic Partial Reconfiguration (DPR) techniques. The worst-case DPR latencies measured are 895 μs and 1.192 ms for digital modulation and channel bandwidth adaptation, respectively. These results show that the adopted design approach is feasible in wireless baseband processing systems. Power estimations suggest that circuit specialization at run-time can potentially improve system power efficiency.

Control architecture based on FPGA for a renewable energy system

Renewable energy systems require real-time and distributed control architectures for achieving high performance levels both in steady-state operation and in transient conditions. Thus, command, control, monitoring and communication functions must be implemented using platforms like uCs, DSPs, or FPGAs. Structuring all the architecture is of fundamental importance when the system contains several and quite different energy sources and is designed to operate in some degraded modes. In this paper it is discussed and presented the design and implementation of a global control and monitoring architecture for a renewable energy system including wind and photovoltaic energy, battery storage and electric grid connection.

A Parallel-Pipelined OFDM Baseband Modulator with Dynamic Frequency Scaling for 5G Systems.

5G heterogeneity will cover a huge diversity of use cases, ranging from enhanced-broadband to low-throughput and low-power communications. To address such requirements variety, this paper proposes a parallel-pipelined architecture for an OFDM baseband modulator with clock frequency run-time adaptation through dynamic frequency scaling (DFS). It supports a set of OFDM numerologies recently proposed for 5G communication systems. The parallel-pipelined architecture can achieve high throughputs at low clock frequencies (up to 520.3 MSamples/s at 160 MHz) and DFS allows for the adjustment of baseband processing clock frequency according to immediate throughput demands. The application of DFS increases the system’s power efficiency by allowing power savings up to 62.5%; the resource and latency overhead is negligible.

Experimental setup for electromagnetically induced transparency observation in hollow-core fibers

We developed a system to investigate resonant nonlinear optical interactions in acetylene molecules, confined in a hollow-core photonic crystal fiber (HC-PCF), using light injection through a low-loss splice from one end of the fiber, allowing us to work at low power. Electromagnetically induced transparency (EIT) was observed in the 1500 nm telecommunications window.