Marise Bafleur
Centre national de la recherche scientifique
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Publication
Featured researches published by Marise Bafleur.
IEEE Transactions on Electron Devices | 1990
Abdellatif Elmoznine; Jean Buxo; Marise Bafleur; Pierre Rossel
The choice of a processing technology and of a design methodology for the realization of a monolithic, solid-state, high-side power switch for automotive applications is discussed. The technology is basically MOS on a high-resistance epilayer and therefore does not contain built-in junction isolation walls. Instead, it is shown that convenient isolation, both static and dynamic, is achieved by a floating-well concept. The floating well, if conveniently protected by a peripheral attenuator circuit, decouples the well voltage from voltage fluctuations in the epilayer that result from turning on and off the VDMOS device, thereby isolating the logic section of the device from the power section. The floating-well technique lends itself to producing isolated capacitors, Zener devices, and a controlled vertical bipolar transistor, which prove to be useful in producing a reliable, low-consumption, fast-switching smart power high-side switch. The technology appears to be suited to handle particularly high current values. >
european conference on radiation and its effects on components and systems | 2009
A Luu; Patrick Austin; F Miller; N Buard; Thierry Carrière; P Poirot; R Gaillard; Marise Bafleur; Gérard Sarrabayrouse
This paper presents 2-D numerical simulation results which allow the definition of the sensitive volume and triggering criteria of SEBs for VDMOS in classic planar-type technology. The results analysis allows for a better understanding of the SEB mechanism.
european conference on radiation and its effects on components and systems | 2007
Aurore Luu; Florent Miller; Patrick Poirot; R. Gaillard; Nadine Buard; Thierry Carriere; Patrick Austin; Marise Bafleur; Gérard Sarrabayrouse
This paper presents a validation of the methodology based upon backside laser irradiations to characterize the sensitivity of power devices towards single-event burnout. This is done thanks to high-energy heavy ion testing and device simulations.
IEEE Transactions on Power Electronics | 2015
Claude Vankecke; Laurent Assouère; Anqing Wang; Paul Durand-Estèbe; Fabrice Caignet; Jean-Marie Dilhac; Marise Bafleur
We suggest an innovative architecture for an efficient energy generator devoted to the powering of a wireless sensor network deployed for aircraft health monitoring. This battery-free generator captures energy from its environment (transient thermal gradients as a main source, and vibrations as a secondary source allowing early biasing of the generator) and stores this energy in ultracapacitors. In this way, this multisource architecture benefits from the synergy between energy scavenging and harvesting: vibrations bring low but early and permanent energy. They also contribute to energy harvesting during cruise while thermal gradients have vanished. The use of active diodes and of a very low bias current of 10 nA/branch allow achieving ultralow power consumption, experimentally demonstrated on two different CMOS technologies. It is also proven that enough energy could be delivered to power the functions of a wireless sensor node.
IEEE Journal of Solid-state Circuits | 2004
David Trémouilles; Marise Bafleur; Géraldine Bertrand; Nicolas Nolhier; Nicolas Mauran; Lionel Lescouzeres
In this paper, we show how latch-up guard rings, surrounding electrostatic discharges (ESD) protection devices, can reduce the overall performance of the ESD protection scheme. This issue is addressed by TCAD simulation and experimental results. Design guidelines to cope with this problem are proposed.
international symposium on power semiconductor devices and ic's | 1992
V. Macary; G. Charitat; Marise Bafleur; Juan Buxo; P. Rossel
Using biased rings instead of floating rings as power devices termination is shown to offer several advantages such as an easy design and simple implementation. An analytical optimization of the biased ring structure is proposed and shown to be in good agreement with 2D simulations. A comparison between biased and floating rings is made, from the point of view of the tolerance on geometrical parameters and space consumed by these structures. Biased structures exhibit a weak dependance on inter-ring distance and interface states as compared to floating structures.
international symposium on power semiconductor devices and ic's | 2005
Christophe Salamero; N. Nolhier; Marise Bafleur; Patrice Besse
This work deals with a method to predict ESD protection robustness with TCAD simulations. Tested on different devices and two smart power technologies, the results are validated with electrical measurement and failure analysis. Failure current is always predicted with a good accuracy compared to technology spreading. In addition, the methodology provides a significant simulation time speedup compared to classical methods based on a temperature criterion.
electrical overstress/electrostatic discharge symposium | 2004
N. Guitard; David Trémouilles; S. Alves; Marise Bafleur; F. Beaudoin; P. Perdu; A. Wislez
A dedicated test vehicle was designed to study the impact of ESD induced latent defects on digital and analog CMOS circuits. Both CDM and TLP stresses were applied to these circuits through a specific pad which allows stressing the circuit core. Both electrical characterization and non-destructive failure analysis were performed to locate the induced defect. For digital circuits, functionality is not affected although the IDDQ quiescent current increased. However, after burn-in and storage, it was observed that the IDDQ current significantly increased suggesting that the circuit lifetime is degraded. In contrast, even at very low stress level, the analog circuit exhibits a dramatic offset degradation and no recovery is observed after burn-in.
IEEE Transactions on Electron Devices | 1993
Marise Bafleur; Juan Buxo; Manuel Vidal; Ph. Givelin; V. Macary; G. Sarrabayrouse
An original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology is presented. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up. >
Journal of Electronic Materials | 2014
Jean-Marie Dilhac; Romain Monthéard; Marise Bafleur; Vincent Boitier; Paul Durand-Estèbe; P. Tounsi
In recent years, wireless sensor networks (WSN) have been considered for various aeronautical applications to perform sensing, data processing and wireless transmission of information, without the need to add extra wiring. However, each node of these networks needs to be self-powered. Considering the critical drawbacks associated with the use of electrochemical energy sources such as narrow operating temperature range and limited lifetime, environmental energy capture allows an alternative solution for long-term, deploy and forget, WSN. In this context, thermoelectricity is a method of choice considering the implementation context. In this paper, we present hands-on experience related to on-going implementations of thermoelectric generators (TEG) in airliners. In a first part, we will explain the reasons justifying the choice of ambient energy capture to power WSN in an aircraft. Then, we will derive the general requirements applying to the functional use of TEG. Finally, in the last section, we will illustrate the above issues through practical implementations.