Mark A. H. Broadmeadow

A single phase AC-DC bidirectional converter with integrated ripple steering

Charging or discharging of batteries connected to the grid usually requires bulky capacitors on the battery side to filter out the large double grid frequency current ripple. This paper proposes a novel single phase ac-dc bidirectional (BD) converter that improves the utilization of the filtering capacitor by actively steering the ripple into it and thereby cycling it through a large portion of its operating voltage range. This greatly reduces the overall capacitance required to filter the double grid frequency current ripple and results in a low cost solution with high power density.

A high cell count cascade full bridge converter for wide bandwidth ultrasonic transducer excitation

A nine level modular multilevel cascade converter (MMCC) based on four full bridge cells is shown driving a piezoelectric ultrasonic transducer at 71 and 39 kHz, in simulation and experimentally. The modular cells are small stackable PCBs, each with two fully integrated surface mount 22 V, 40 A MOSFET half-bridge converters, and include all control signal and power isolation. In this work, the bridges operate at 12 V and 384 kHz, to deliver a 96 Vpp 9 level waveform with an effective switching frequency of 3 MHz. A 9 μH air cored inductor forms a low pass filter in conjunction with the 3000 pF capacitance of the transducer load. Eight equally phase-displaced naturally sampled pulse width modulation (PWM) drive signals, along with the modulating sinusoid, are generated using phase accumulation techniques in a dedicated FPGA. Experimental time domain and FFT plots of the multilevel and transducer output waveforms are presented and discussed.

Digital tablets as a tool for blended learning in power engineering education

Digital tablets have been identified as a tool for enabling blended learning and supporting online teaching and learning. A small scale trial was undertaken to assess the effectiveness of this technology when applied to power engineering education. Critical findings and experiences gained from this trial, including potential benefits, presentation techniques and the resulting student feedback are presented in this paper.

Design of coreless PCB transformers for power and signal isolation in a modular ADC system for power quality data acquisition

Available industrial energy meters offer high accuracy and reliability, but are typically expensive and low-bandwidth, making them poorly suited to multi-sensor data acquisition schemes and power quality analysis. An alternative measurement system is proposed in this paper that is highly modular, extensible and compact. To minimise cost, the device makes use of planar coreless PCB transformers to provide galvanic isolation for both power and data. Samples from multiple acquisition devices may be concentrated by a central processor before integration with existing host control systems. This paper focusses on the practical design and implementation of planar coreless PCB transformers to facilitate the modules isolated power, clock and data signal transfer. Calculations necessary to design coreless PCB transformers, and circuits designed for the transformers practical application in the measurement module are presented. The designed transformer and each application circuit have been experimentally verified, with test data and conclusions made applicable to coreless PCB transformers in general.

A LIN inspired optical bus for signal isolation in multilevel or modular power electronic converters

Proposed in this paper is a low-cost, half-duplex optical communication bus for control signal isolation in modular or multilevel power electronic converters. The concept is inspired by the Local Interconnect Network (LIN) serial network protocol as used in the automotive industry. The proposed communications bus utilises readily available optical transceivers and is suitable for use with low-cost microcontrollers for distributed control of multilevel converters. As a signal isolation concept, the proposed optical bus enables very high cell count modular multilevel cascaded converters (MMCCs) for high-bandwidth, high-voltage and high-power applications. Prototype hardware is developed and the optical bus concept is validated experimentally in a 33-level MMCC converter operating at 120 Vrms and 60 Hz.

Real time maximum power conversion tracking and resonant frequency modification for high power piezoelectric ultrasound transducer

Piezoelectric ultrasound transducers are commonly used to convert mechanical energy to electrical energy and vice versa. The transducer performance is highly affected by the frequency at which it is excited. If excitation frequency and main resonant frequency match, transducers can deliver maximum power. However, the problem is that main resonant frequency changes in real time operation resulting in low power conversion. To achieve the maximum possible power conversion, the transducer should be excited at its resonant frequency estimated in real time. This paper proposes a method to first estimate the resonant frequency of the transducer and then tunes the excitation frequency accordingly in real time. The measurement showed a significant difference between the offline and real time resonant frequencies. Also, it was shown that the maximum power was achieved at the resonant frequency estimated in real time compare to the one measured offline.

Comparison of the gate drive parameter space for driving power MOSFETs using conventional and cascode configurations

Conventional voltage driven gate drive circuits utilise a resistor to control the switching speed of power MOS-FETs. The gate resistance is adjusted to provide controlled rate of change of load current and voltage. The cascode gate drive configuration has been proposed as an alternative to the conventional resistor-fed gate drive circuit. While cascode drive is broadly understood in the literature the switching characteristics of this topology are not well documented. This paper explores, through both simulation and experimentation, the gate drive parameter space of the cascode gate drive configuration and provides a comparison to the switching characteristics of conventional gate drive.

Comparative analysis of FPGA-based digital pulse width modulation techniques for multiphase DC-DC converters

This paper proposes the development of a new digital pulse width modulation (PWM) scheme for aplication to both single phase and multiphase voltage regulation modules (VRMs), which are used as processor power supplies. A comparative analysis of this novel phase accumulator based PWM generation technique is presented with the traditionally used counter based PWM approach for synchronous buck converter topologies. A simulation study of open loop systems of these digital techniques is carried out to demonstrate their feasibility and performance characteristics. For practical evaluation of these two techniques, experiments in single-phase and eight-phase 12 V to 1V buck converter controlled by an FPGA are performed by using the 16 bit phase accumulator and counter. The impact from the interleaving strategy is presented and peak-to-peak voltage ripple and output spectra are evaluated.

Advanced resampling techniques for PWM amplifiers in real-time applications

Regularly sampled pulse width modulation (PWM) has been a mainstay of the power electronics community since the advent of digital controllers. In this form of PWM the modulating signal is sampled only at either the peaks and/or the troughs of the triangular carrier waveform, then held constant until the next sampling instant, which allows ample time for the calculation of switching instants. Unfortunately, it produces phase and amplitude distortion of the modulating signal that can be significant at low pulse numbers. In applications where the desired modulating signal is not known a priori, this phase delay can become a critical limitation. The analogue alternative to regular sampling is naturally sampled PWM, where the modulating signal is permitted to vary as a continuous waveform. This form of PWM does not apply any phase or amplitude distortion to the modulating signal. True natural sampling is, however, impossible to implement on the digital control platforms that are used in modern power electronics applications. In this paper, a type of hold circuit known as a First-Order Hold (FOH) circuit is used in conjunction with the technique known as resampled regular PWM to improve upon the limitations of regular sampling. It is found that this augmentation to the PWM strategy improves both the linearity and phase delay of the modulator as well as (for high pulse numbers) harmonic performance. The FOH circuit has an overshoot in its transfer function which should be avoidable if the modulating signal is sampled at a sufficiently high rate.

Frequency modulation of a series resonant dual active bridge to minimize the circulating reactive currents in the high frequency link

A frequency modulation scheme is proposed for a Capacitor-Inductor-Inductor-Capacitor (CLLC) Resonant Dual Active Bridge (RDAB) that relies on dynamic retuning of the resonant capacitors to the switching frequency as it is modulated. The proposed modulation scheme greatly reduces the circulating reactive currents in the High Frequency Link (HFL) by operating at a range of fixed discrete switching frequencies. A Triple Phase Shift (TPS) modulation scheme is used in between the discrete steps of switching frequencies and capacitances. In this paper, a mathematical analysis is presented of the RDAB and the proposed modulation scheme is compared to all of the existing modulation schemes. The CLLC RDAB is implemented in simulation and the simulation results demonstrate the effectiveness of the proposed modulation scheme at decreasing the circulating reactive currents, and therefore, greatly decreasing the conduction losses of the converter at light load, while maintaining its soft switching capability.