Mark Shand

Adaptive optics system for the new Swedish solar telescope

The 1-meter Swedish solar telescope is a new solar telescope that was put in operation on the island of La Palma in the Canary Islands at the end of May 2002. The goal of this telescope is to reach its diffraction limited resolution of 0.1 arcsec in blue light. This has already been achieved by use of a low-order adaptive optics (AO)system. This paper describes the AO system initially developed for the former 50-cm Swedish Vacuum Solar Telescope (SVST) and further improved for the new telescope. Both systems use a combination of bimorph modal mirrors and Shack-Hartmann wavefront sensors. Unique to these systems are that they rely on a single workstation or a PC to do all the computations required to extract and pre-process the images, measure their positions using cross correlation techniques and for controlling the deformable mirror. This is in the present system possible by using the PERR instruction available on Compaqs Alpha architecture and in the new system using the PSADDBW instruction, available on Pentium 4 and Athlon processors. We describe both these systems with an emphasis on the performance, the ease of support and upgrades of performance. We also describe the optimization of the electrode geometry for the new 37-electrode bimorph mirror, supplied by AOPTIX Technologies, Inc., for controlling Karhunen--Loeve modes. Expected performance, based on closed-loop simulations, is discussed.

Sepia: scalable 3D compositing using PCI Pamette

We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rates and low latency through pipelining and the use of a high bandwidth network technology to transfer the image data. It is flexible because it uses programmable FPGA devices to implement the combining logic. The implementation cost is kept low by using only commodity components for the network and graphics, and FPGA logic. The result is a cost-effective interactive visualization system that can be used with a variety of applications running on distributed computing systems such as cluster of workstations and personal computers. We first motivate the development of a distributed rendering system and we introduce some of the concepts related to the 3D-visualization domain. We then describe our implementation of this system using the PCI Pamette FPGA-based board. We emphasize the advantages of using a programmable board for the prototype development and also for a potential commercial version.

Scalable interactive volume rendering using off-the-shelf components

Describes an application of a second generation implementation of the Sepia architecture (Sepia-2) to interactive volumetric visualization of large rectilinear scalar fields. By employing pipelined associative blending operators in a sort-last configuration a demonstration system with 8 rendering computers sustains 24 to 28 frames per second while interactively rendering large data volumes (1024/spl times/256/spl times/256 voxels, and 512/spl times/512/spl times/512 voxels). We believe interactive performance at these frame rates and data sizes is unprecedented. We also believe these results can be extended to other types of structured and unstructured grids and a variety of GL rendering techniques including surface rendering and shadow mapping. We show how to extend our single-stage crossbar demonstration system to multi-stage networks in order to support much larger data sizes and higher image resolutions. This requires solving a dynamic mapping problem for a class of blending operators that includes Porter-Duff compositing operators.

Systems performance measurement on PCI Pamette

We describe the use of a reconfigurable board to obtain information on the performance that can be expected on particular systems. Our goal is to use the reconfigurability, of the boards interface to test a system and discover not only the maximum bandwidth and best latency attainable, but also the way to reliably achieve these figures. The board we present uses the now widespread PCI bus. PCI is sufficiently complex, and its implementations sufficiently varied, that it is impossible to guess the performance that can be obtained by a specific board on a specific computer with the only technical characteristics of the two in hand. We observe astonishing performance differences between almost identical systems and comparable figures between small PCs and big servers. Our performance tests can be an end in themselves, however, they also serve to demonstrate the value of a reconfigurable bus interface. With the same board, we can test and choose a system, make informed architectural decisions on the hardware/software interface, and then finely tune the bus interface to get maximum and predictable figures in the running application.

Workstation-based solar/stellar adaptive optics system

The microprocessors used in off-the-shelf workstations double in performance every eighteen months. The Swedish Vacuum Solar Tower (SVST) uses off-the-shelf workstations for all aspects of its on-line telescope control and data acquisition. Since 1995 workstation performance has been adequate for a correlation tracker of solar granulation controlling a tip- tilt corrector. In 2000 workstation performance permits the construction of a 20 - 50 subimage Shack-Hartmann based low- latency adaptive optics system. It is argued that workstations provide a cost-effective, upgradable, low-risk and flexible means of construction of stellar and solar adaptive optics systems. We give an overview of the adaptive optics system installed at the SVST in May 1999. The system uses a bimorph modal mirror with 19 electrodes from Laplacian Optics. For use with extended targets, such as solar fine structure, cross- correlations with 16 X 16-pixel sub-images are used. For use with point sources, a centroiding algorithm is implemented. The work station used is capable of completing all processing required by the adaptive optics system in 0.5 ms (cross-correlations) or 0.3 ms (centroiding), with potential for significant performance improvements.

A wireless LAN demodulator in a Pamette: design and experience

We have implemented the digital section of a wireless local area network (WLAN) demodulator in a reconfigurable interface card called the PCI Pamette. The entire baseband section of the demodulator has been implemented using the Pamette and a simple analog to digital mezzanine board. This is the second version of the demodulator, the first being a card-based design using a mixture of discrete and reconfigurable logic. The Pamette design took far less time to complete than the card-based one. Moreover, the reconfigurable substrate is much more versatile. We describe the Pamette implementation and discuss our experiences with the two different design styles and technologies.

3.8-ms latency correlation tracker for active mirror control based on a reconfigurable interface to a standard workstation

We describe the use of a reconfigurable interface board based on FPGAs and a UNIX workstation to implement a correlation tracker with 3.8ms latency. The correlation tracker is part of an active mirror system in use at the Swedish Vacuum Solar Telescope, La Palma, Canary Islands. The reconfigurable interface is used to leverage the workstation CPU, relieving it of tasks that it performs poorly such as rapid context switching and low-level bit manipulation. The reconfigurable interface handles control of external devices, high- performance input (16 MB/s) and data preformatting. The workstation CPU, a 64-bit microprocessor, performs the bulk of the computation. For the key computations of the correlation tracker we are able to treat 8 pixels in parallel in the CPUs 64-bit integer datapath. We present the structure of the CCD interface configuration and the implementations of the key algorithms on the workstation CPU. We describe the design trade-offs that arose during the development of the system, and demonstrate the symbiosis between components implemented in software and configurable hardware.

Hardware/software integration in solar polarimetry

A polarimetry system for solar astronomy is presented. The system is based on a reconfigurable coprocessor attached to a conventional workstation. Although the computationally intensive parts of the application are performed in the host processor the reconfigurable coprocessor plays a key role in taking charge of tasks that the host performs poorly, such as cycle-by-cycle data marshalling and real-time synchronization. The runtime environment supporting the reconfigurable coprocessor makes it easy to experiment with different implementation tradeoffs and postpone the final partitioning of functionality between the host and reconfigurable coprocessor until quite late in the design process.

The Swedish Vacuum Solar Telescope data-acquisition and control systems

Abstract The performance of commodity computer systems doubles approximately every 18 months. Traditionally, the design of scientific data-acquisition and control systems has tended to ignore this fact, relying instead on custom hardware developments using the technology available at the time of instrument specification. Moreover, development manpower is usually limited, causing relatively long development cycles. Often the the result is that an instrument is technologically obsolete quite early in its projected lifetime. In contrast, all the digital processing for data acquisition and control at the Swedish Vacuum Solar Telescope (SVST) on La Palma (Canary Islands) is performed with commodity workstations. The result is a flexible system with low development costs that can easily take advantage of the latest microprocessor advances. The SVSTs use of commodity workstations in on-line real-time tasks is in large part made possible by its use of reconfigurable interface technology. Indeed the SVST has been a valuable proving ground for this technology. This article summarizes the instrumentation of the SVST and illustrates examples of data recorded with this instrumentation.