Markus Gabriel

Ultrathin wafer handling in 3D Stacked IC manufacturing combining a novel ZoneBOND™ temporary bonding process with room temperature peel debonding

Among the technological developments pushed by the emergence of 3D Stacked IC technologies, temporary wafer bonding and thinning have become key elements in device processing over the past years. While these elements are now mature enough for high-volume manufacturing, thin wafer debonding and handling still remain challenging. Hence this work focuses on a novel ZoneBOND approach to face these challenges.

W2W permanent stacking for 3D system integration

In this paper, we present advances in 300mm wafer-to-wafer (W2W) oxide-oxide bonding for high density 3D interconnect application. A CMOS compatible low temperature oxide-oxide bonding method has been developed which yields consistent void-free bonding. In addition, sub-micron W2W alignment accuracy has been demonstrated with standalone test materials using an integrated permanent bonding platform.

Low-Temperature Direct Bonding of Borosilicate, Fused Silica, and Functional Coatings

Plasma activation at atmospheric pressure has proved to be a suitable pre-treatment process for low-temperature direct bonding of silicon wafers [1]. The activation with a dielectric barrier discharge in oxygen process gas is known to form a porous silicon dioxide which apparently has beneficial structural properties for low-temperature bonding [2]. Activation in oxygen, nitrogen, or synthetic air increases bond strength and reduces accumulation of bond defects during annealing. In experiments using inert gas mixtures with hydrogen or ammonia, on the other hand, only a slight increase of bond strength was found. Furthermore the accumulation of bond defects during annealing was stronger than for the non-treated reference wafer [3]. New experiments on borosilicate glass and fused silica glass as well as silicon wafers covered by silicon dioxide, silicon nitride, and silicon oxynitride, resp., were done for low-temperature bonding. The substrates were activated either in a self-made setup of Fraunhofer IST or using the “Plasma Tooling” of SUSS MicroTec aligner. Before plasma activation, the substrates were cleaned from particle by a spin rinse step. After activation the substrates were bonded in ambient air whereas reference wafers were bonded without plasma activation. The transient development of bond strength during annealing of a wafer pair was characterized by dynamic surface energy measurements. Therefor we used a setup for crack length measurements in situ, consisting of selfmade fixtures for the wafer pair and the blade, and a motor, driving the blade through the bonded interface. The setup was placed in a furnace and pictures of the crack were taken by IR transmission photography during annealing [4]. In the following figures both the surface energy and the wafer temperature are plotted over the annealing time. Results for plasma activated borosilicate wafer are shown in Fig. 1.

Process characterization of thin wafer debonding with thermoplastic materials

Among the technological developments pushed by the emergence of 3D Stacked IC technologies, temporary wafer bonding and thinning have become key elements in device processing over the past years. While these elements are now mature enough for high-volume manufacturing, thin wafer debonding and handling still remain challenging. Hence this work focuses on extensive characterization of a thermal debonding approach to answer these challenges.

Equipment challenges and solutions for diverse temporary bonding and de-bonding processes in 3D integration

While several methods are available and in production for power devices, LED or other markets, 200mm and 300mm temporary bonding for 3D integration is a quite new field for material and equipment suppliers and challenging all participants in the supply chain. These paper presents an overview of existing and emerging processes on a flexible equipment platform to match the requirements of the end user