Markus Schwarz

Single chip CMOS imagers and flexible microelectronic stimulators for a retina implant system

We are presenting CMOS image sensors and a microelectronic stimulator for realization of a retina implant system that will provide visual sensations using electrostimulation to patients suffering from photoreceptor degeneration. Four CMOS image sensors implementing different principles, e.g. linear characteristic, logarithmic characteristic, and local brightness adaptation have been developed. These are directly attached to a digital filter and signal processor unit that computes the so-called receptive-field functions for generation of the stimulation data. These external components are wireless linked to an implanted flexible silicon multielectrode microstimulator which generates electrical signals for electrostimulation of the intact ganglion cells. All components including additional hardware for digital signal processing and wireless data and power transmission have been developed for fabrication using our in-house standard CMOS-technology.

Single-chip CMOS image sensors for a retina implant system

This work describes the architecture and realization of microelectronic components for a retina-implant system that will provide visual sensations to patients suffering from photoreceptor degeneration. Special circuitry has been developed for a fast single-chip CMOS image sensor system, which provides high dynamic range of more than seven decades (without any electronic or mechanical shutter) corresponding to the performance of the human eye. This image sensor system is directly coupled to a digital filter and a signal processor that compute the so-called receptive-field function for generation of the stimulation data. These external components are wireless, linked to an implanted flexible silicon multielectrode stimulator, which generates electrical signals for electrostimulation of the intact ganglion cells. All components, including additional hardware for digital signal processing and wireless data and power transmission, have been fabricated using in-house standard CMOS technology.

Smart CMOS image sensor arrays

In this paper, we present several smart image sensor arrays intended for various applications. We discuss the realization of image sensors in CMOS technology and show some examples of one-dimensional (1-D) and two-dimensional (2-D) smart image arrays.

Hardware architecture of a neural net based retina implant for patients suffering from retinitis pigmentosa

This work describes the architecture and planned realization of components for a retina implant which includes a sensory device for image acquisition, biologically inspired neural nets for modeling and computation of receptive field functions, and a human interface for electrostimulation of ganglion cells. The system will be used to generate visual sensations based on captured visual images for patients with degenerated retina functions. Special CMOS circuitry will be developed for an integrated photodetector array with preprocessing according to the requirements for biology inspired spatio-temporal signal processing. Also, the development will include a flexible silicon multielectrode structure with microelectronic action potential generation for stimulation of intact retinal ganglion cells and a wireless communication interface linking the external retina encoder hardware and the implanted stimulator hardware.

Single chip CMOS image sensors for a retina implant system

This work describes the architecture and realization of microelectronic components for a retina implant system that will provide visual sensations to patients with photoreceptor degeneration by applying electrostimulation of the intact retinal ganglion cell layer. Special circuitry has been developed for a fast single-chip CMOS image sensor system which provides high dynamic range of more than seven decades (without a mechanical shutter) corresponding to the performance of the human eye. This image sensor system is directly attachable to a digital filter and a signal processor that compute the so-called receptive-field function for generation of the stimulation data. These external components are wireless linked to an implanted flexible silicon multielectrode stimulator which generates electrical signals for electrostimulation of the intact ganglion cells. All components, including additional hardware for digital signal processing and wireless data and power transmission have been developed for fabrication using our in-house standard CMOS-technology.

High speed camera system using a CMOS image sensor

In this paper a new camera system for high speed imaging is presented, which is capable of recording images with a resolution of 256/spl times/256 pixels and frame rates in excess of 1000 frames per second. It uses an image sensor with on-chip electronic shutter and has been fabricated in standard 1 /spl mu/m standard CMOS process. The camera system contains an image memory for sequence recording. The camera delivers a very good image quality without any external algorithm for image enhancement and provides a very fast interface between the image acquisition and image processing unit. The CMOS imagers also have the ability to acquire images in a very short period. This allows an adaptation of the camera to various automotive applications like occupancy detection, airbag control, pre-crash sensing, collision avoidance, surveillance, and crash test observation. Moreover, the system architecture makes a combination of several applications possible using just a single image sensor unit.

A CMOS-array-computer with on-chip communication hardware developed for massively parallel applications

The authors present a scalable MIMD computer system which was designed to be used as neurocomputer. It is capable of emulating different types of neurons, including complex biologically motivated models based on activity pulses, variable pulse transmission times, and multiple threshold learning rules. It is constructed as an array consisting of nodal computer chips, each containing an on-chip communication processor to realize a full global communication. Hence, not only neural networks featuring arbitrary topologies can be built, but also a wide range of nonneural processing applications can be implemented. As an example, the authors show how to use the system in solving optimization problems using genetic algorithms, and how to program it for real-time image processing using a combination of neural nets, genetic algorithms, and classical image processing techniques.<<ETX>>

Micro implantable visual prostheses

Two micro implantable visual prosthesis systems for blind patients are described. The first system is a retina implant which is based on an implantable microelectrostimulator applicable for patients suffering from retinitis pigmentosa or macula degeneration, and has been already successfully tested in animal experiments. The second system is an intraocular vision aid based on an implantable intraocular optoelectronic display encapsulated into an silicone diaphragm which is applicable for patients suffering from bilateral corneal opacification but with intact posterior ocular segment. Both systems employ wireless power and data transmission using an 13 MHz RF-link for power transmission and either ASK modulation of the RF-carrier or an near IR optical link for data transmission from an external image acquisition and telemetry unit to both implantable micro devices.

A CMOS image sensor with local brightness adaptation and high intrascene dynamic range

An integrated CMOS image sensor with 128×128 pixels and local brightness adaptation suitable for machine vision and surveillance applications has been developed and successfully tested. Local brightness adaptation is achieved by dividing the input photocurrent of each sensor pixel by its local average. Since the irradiance at the imager is based on a nonlinear multiplicative combination of scene illumination and object surface reflectance, the output signal of the imager will depend only on the visually relevant reflectance component if the illumination does not significantly vary within the averaging area. The computation of local average is realized by spatial low-pass filtering the input photocurrent distribution using a 2D pseudo-resistive diffusion network. Division by local average inside each pixel is based on a translinear divider. The chip has been realized in a 1 µm n-well standard CMOS process. The pixel pitch is 53,4 µm and the total chip area is 68 mm2.

Real-time application of biology-inspired neural networks using an emulator with dedicated communication hardware

In this paper we present a new biology-inspired neuron model and its real-time realization using a dedicated neural hardware emulator. The biological neuron model overcomes the limitations of classical neuron models by including dynamic features such as adaptive synaptic delays. The emulator used for its realization is based on a special communication processor optimized for the global exchange of pulse messages between neuron processors. The use of the model together with the emulator in real-time adaptive signal processing is shown using an example in the field of fault-tolerant adaptive beamforming.